##############################################
# Configuration file for running experiments
##############################################

# Path to directory of circuits to use
circuits_dir=benchmarks/blif/multiclock

# Path to directory of architectures to use
archs_dir=arch/timing

# Add circuits to list to sweep
circuit_list_add=multiclock.blif

# Add architectures to list to sweep
arch_list_add=k6_N10_mem32K_40nm.xml

# Parse info and how to parse
parse_file=vpr_standard.txt

# How to parse QoR info
qor_parse_file=qor_standard.txt

# Pass requirements
pass_requirements_file=pass_requirements.txt

# Script parameters
script_params_common = -starting_stage vpr --seed 6
script_params_list_add = -sdc_file sdc/samples/A.sdc
script_params_list_add = -sdc_file sdc/samples/B.sdc
script_params_list_add = -sdc_file sdc/samples/C.sdc
script_params_list_add = -sdc_file sdc/samples/D.sdc
script_params_list_add = -sdc_file sdc/samples/E.sdc
script_params_list_add = -sdc_file sdc/samples/F.sdc
script_params_list_add = -sdc_file sdc/samples/create_clock/sink_pin_targets.sdc
script_params_list_add = -sdc_file sdc/samples/create_clock/sink_pin_targets_2.sdc
