arch	circuit	script_params	vtr_flow_elapsed_time	vtr_max_mem_stage	vtr_max_mem	error	odin_synth_time	max_odin_mem	parmys_synth_time	max_parmys_mem	abc_depth	abc_synth_time	abc_cec_time	abc_sec_time	max_abc_mem	ace_time	max_ace_mem	num_clb	num_io	num_memories	num_mult	vpr_status	vpr_revision	vpr_build_info	vpr_compiler	vpr_compiled	hostname	rundir	max_vpr_mem	num_primary_inputs	num_primary_outputs	num_pre_packed_nets	num_pre_packed_blocks	num_netlist_clocks	num_post_packed_nets	num_post_packed_blocks	device_width	device_height	device_grid_tiles	device_limiting_resources	device_name	pack_mem	pack_time	initial_placed_wirelength_est	placed_wirelength_est	total_swap	accepted_swap	rejected_swap	aborted_swap	place_mem	place_time	place_quench_time	initial_placed_CPD_est	placed_CPD_est	placed_setup_TNS_est	placed_setup_WNS_est	placed_geomean_nonvirtual_intradomain_critical_path_delay_est	place_delay_matrix_lookup_time	place_quench_timing_analysis_time	place_quench_sta_time	place_total_timing_analysis_time	place_total_sta_time	ap_mem	ap_time	ap_full_legalizer_mem	ap_full_legalizer_time	min_chan_width	routed_wirelength	min_chan_width_route_success_iteration	logic_block_area_total	logic_block_area_used	min_chan_width_routing_area_total	min_chan_width_routing_area_per_tile	min_chan_width_route_time	min_chan_width_total_timing_analysis_time	min_chan_width_total_sta_time	crit_path_num_rr_graph_nodes	crit_path_num_rr_graph_edges	crit_path_collapsed_nodes	crit_path_routed_wirelength	crit_path_route_success_iteration	crit_path_total_nets_routed	crit_path_total_connections_routed	crit_path_total_heap_pushes	crit_path_total_heap_pops	critical_path_delay	geomean_nonvirtual_intradomain_critical_path_delay	setup_TNS	setup_WNS	hold_TNS	hold_WNS	crit_path_routing_area_total	crit_path_routing_area_per_tile	router_lookahead_computation_time	crit_path_route_time	crit_path_create_rr_graph_time	crit_path_create_intra_cluster_rr_graph_time	crit_path_tile_lookahead_computation_time	crit_path_router_lookahead_computation_time	crit_path_total_timing_analysis_time	crit_path_total_sta_time	num_global_nets	num_routed_nets	
timing/k6_N10_40nm.xml	microbenchmarks/d_flip_flop.v	common_--clock_modeling_ideal_--route_chan_width_60	0.33	vpr	59.07 MiB		-1	-1	0.05	19860	1	0.02	-1	-1	29460	-1	-1	1	2	-1	-1	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:13:40	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	60484	2	1	3	4	1	3	4	3	3	9	-1	auto	20.3 MiB	0.00	6	6	9	3	5	1	59.1 MiB	0.00	0.00	0.55447	0.55447	-0.91031	-0.55447	0.55447	0.00	1.0117e-05	6.61e-06	7.3207e-05	5.4331e-05	-1	-1	-1	-1	-1	2	4	18000	18000	14049.7	1561.07	0.00	0.00119306	0.001117	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	1	2	
timing/k6_N10_40nm.xml	microbenchmarks/d_flip_flop.v	common_--clock_modeling_route_--route_chan_width_60	0.32	vpr	59.07 MiB		-1	-1	0.06	19860	1	0.02	-1	-1	29500	-1	-1	1	2	-1	-1	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:13:40	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	60488	2	1	3	4	1	3	4	3	3	9	-1	auto	20.4 MiB	0.00	9	9	9	1	5	3	59.1 MiB	0.00	0.00	0.56425	0.48631	-0.91031	-0.48631	0.48631	0.00	1.0429e-05	6.884e-06	7.8262e-05	5.7708e-05	-1	-1	-1	-1	-1	4	3	18000	18000	15707.9	1745.32	0.00	0.000978804	0.0009103	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	0	3	
timing/k6_N10_40nm.xml	verilog/mkPktMerge.v	common_--clock_modeling_ideal_--route_chan_width_60	18.17	parmys	203.85 MiB		-1	-1	14.84	208740	2	0.94	-1	-1	53800	-1	-1	155	5	-1	-1	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:13:40	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	62428	5	156	191	347	1	163	316	15	15	225	clb	auto	21.5 MiB	0.02	93	29	155116	112518	5365	37233	61.0 MiB	0.16	0.00	1.75726	1.49664	-15.1339	-1.49664	1.49664	0.00	0.000239383	0.00022257	0.039846	0.037156	-1	-1	-1	-1	-1	20	4	3.042e+06	2.79e+06	863192.	3836.41	0.01	0.0450491	0.0419556	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	154	9	
timing/k6_N10_40nm.xml	verilog/mkPktMerge.v	common_--clock_modeling_route_--route_chan_width_60	18.07	parmys	202.97 MiB		-1	-1	14.65	207840	2	0.96	-1	-1	53800	-1	-1	155	5	-1	-1	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:13:40	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	62232	5	156	191	347	1	163	316	15	15	225	clb	auto	21.0 MiB	0.02	102	35	149741	107944	5843	35954	60.8 MiB	0.14	0.00	1.51873	1.49775	-14.6138	-1.49775	1.49775	0.00	0.000228863	0.000212897	0.0334847	0.0310352	-1	-1	-1	-1	-1	62	4	3.042e+06	2.79e+06	892591.	3967.07	0.01	0.0380521	0.0352776	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	153	10	
timing/k6_N10_mem32K_40nm.xml	microbenchmarks/d_flip_flop.v	common_--clock_modeling_ideal_--route_chan_width_60	0.37	vpr	64.69 MiB		-1	-1	0.07	19640	1	0.02	-1	-1	29472	-1	-1	1	2	0	0	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:13:40	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	66244	2	1	3	4	1	3	4	3	3	9	-1	auto	26.1 MiB	0.00	6	6	9	3	5	1	64.7 MiB	0.00	0.00	0.55247	0.55247	-0.90831	-0.55247	0.55247	0.00	9.675e-06	6.204e-06	7.0457e-05	5.0742e-05	-1	-1	-1	-1	-1	2	3	53894	53894	12370.0	1374.45	0.00	0.0010265	0.000953622	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	1	2	
timing/k6_N10_mem32K_40nm.xml	microbenchmarks/d_flip_flop.v	common_--clock_modeling_route_--route_chan_width_60	0.37	vpr	64.69 MiB		-1	-1	0.06	19640	1	0.02	-1	-1	29612	-1	-1	1	2	0	0	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:13:40	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	66244	2	1	3	4	1	3	4	3	3	9	-1	auto	26.1 MiB	0.00	9	9	9	1	5	3	64.7 MiB	0.00	0.00	0.56425	0.48631	-0.90831	-0.48631	0.48631	0.00	1.0026e-05	6.441e-06	7.2943e-05	5.2914e-05	-1	-1	-1	-1	-1	4	2	53894	53894	14028.3	1558.70	0.00	0.00102102	0.000953994	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	0	3	
timing/k6_N10_mem32K_40nm.xml	verilog/mkPktMerge.v	common_--clock_modeling_ideal_--route_chan_width_60	3.18	vpr	72.01 MiB		-1	-1	0.61	28472	2	0.10	-1	-1	33720	-1	-1	43	311	15	0	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:13:40	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	73736	311	156	972	1128	1	953	525	28	28	784	memory	auto	32.8 MiB	0.31	19988.9	8453	243980	105220	135674	3086	72.0 MiB	0.88	0.01	4.9683	4.40183	-4382.54	-4.40183	4.40183	0.00	0.00332705	0.00280353	0.389535	0.335157	-1	-1	-1	-1	-1	12150	10	4.25198e+07	1.05374e+07	2.96205e+06	3778.13	0.21	0.491035	0.428409	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	15	938	
timing/k6_N10_mem32K_40nm.xml	verilog/mkPktMerge.v	common_--clock_modeling_route_--route_chan_width_60	3.17	vpr	72.38 MiB		-1	-1	0.63	28472	2	0.10	-1	-1	33616	-1	-1	43	311	15	0	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:13:40	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	74116	311	156	972	1128	1	953	525	28	28	784	memory	auto	32.8 MiB	0.31	20164.8	8904	241863	106076	132920	2867	72.4 MiB	0.82	0.01	5.08332	3.97643	-4170.74	-3.97643	3.97643	0.00	0.00309878	0.00271391	0.36424	0.314375	-1	-1	-1	-1	-1	12778	12	4.25198e+07	1.05374e+07	3.02951e+06	3864.17	0.24	0.476367	0.417144	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	14	939	
