 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  initial_placed_wirelength_est	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  initial_placed_CPD_est	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  routed_wirelength	  avg_routed_wirelength	  routed_wiresegment	  avg_routed_wiresegment	  total_nets_routed	  total_connections_routed	  total_heap_pushes	  total_heap_pops	  logic_block_area_total	  logic_block_area_used	  routing_area_total	  routing_area_per_tile	  crit_path_route_success_iteration	  num_rr_graph_nodes	  num_rr_graph_edges	  collapsed_nodes	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  create_rr_graph_time	  create_intra_cluster_rr_graph_time	  adding_internal_edges	  route_mem	  crit_path_route_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	  router_lookahead_mem	  tile_lookahead_computation_time	  router_lookahead_computation_time	 
 fix_clusters_multiple_clb.xml	  apex2.blif	  common	  6.15	  vpr	  113.62 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  38	  -1	  -1	  success	  v8.0.0-15507-gddaa1a80a6-dirty	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-79-generic x86_64	  2026-04-05T11:32:02	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/large_partition_regions	  116352	  38	  3	  1916	  0	  0	  1508	  707	  46	  46	  -1	  -1	  -1	  -1	  -1	  37274.1	  22296	  236807	  74960	  156508	  5339	  113.6 MiB	  4.96	  0.03	  29.9957	  10.2646	  -30.452	  -10.2646	  nan	  0.01	  0.00275704	  0.00217202	  0.224271	  0.179795	  113.6 MiB	  4.96	  113.6 MiB	  0.42	  25664	  17.0186	  25664	  17.0186	  11174	  41880	  3797645	  692230	  4.31593e+06	  1.48473e+06	  8.72079e+06	  4121.36	  17	  291456	  1125920	  -1	  10.1829	  nan	  -30.0827	  -10.1829	  0	  0	  1.09	  -1	  -1	  113.6 MiB	  0.91	  0.557009	  0.467363	  96.3 MiB	  -1	  0.22	 
