arch	circuit	script_params	vtr_flow_elapsed_time	vtr_max_mem_stage	vtr_max_mem	error	odin_synth_time	max_odin_mem	parmys_synth_time	max_parmys_mem	abc_depth	abc_synth_time	abc_cec_time	abc_sec_time	max_abc_mem	ace_time	max_ace_mem	num_clb	num_io	num_memories	num_mult	vpr_status	vpr_revision	vpr_build_info	vpr_compiler	vpr_compiled	hostname	rundir	max_vpr_mem	num_primary_inputs	num_primary_outputs	num_pre_packed_nets	num_pre_packed_blocks	num_netlist_clocks	num_post_packed_nets	num_post_packed_blocks	device_width	device_height	device_grid_tiles	device_limiting_resources	device_name	pack_mem	pack_time	initial_placed_wirelength_est	placed_wirelength_est	total_swap	accepted_swap	rejected_swap	aborted_swap	place_mem	place_time	place_quench_time	initial_placed_CPD_est	placed_CPD_est	placed_setup_TNS_est	placed_setup_WNS_est	placed_geomean_nonvirtual_intradomain_critical_path_delay_est	place_delay_matrix_lookup_time	place_quench_timing_analysis_time	place_quench_sta_time	place_total_timing_analysis_time	place_total_sta_time	ap_mem	ap_time	ap_full_legalizer_mem	ap_full_legalizer_time	min_chan_width	routed_wirelength	min_chan_width_route_success_iteration	logic_block_area_total	logic_block_area_used	min_chan_width_routing_area_total	min_chan_width_routing_area_per_tile	min_chan_width_route_time	min_chan_width_total_timing_analysis_time	min_chan_width_total_sta_time	crit_path_num_rr_graph_nodes	crit_path_num_rr_graph_edges	crit_path_collapsed_nodes	crit_path_routed_wirelength	crit_path_route_success_iteration	crit_path_total_nets_routed	crit_path_total_connections_routed	crit_path_total_heap_pushes	crit_path_total_heap_pops	critical_path_delay	geomean_nonvirtual_intradomain_critical_path_delay	setup_TNS	setup_WNS	hold_TNS	hold_WNS	crit_path_routing_area_total	crit_path_routing_area_per_tile	router_lookahead_computation_time	crit_path_route_time	crit_path_create_rr_graph_time	crit_path_create_intra_cluster_rr_graph_time	crit_path_tile_lookahead_computation_time	crit_path_router_lookahead_computation_time	crit_path_total_timing_analysis_time	crit_path_total_sta_time	
fixed_k6_frac_N8_22nm.xml	single_wire.v	common	1.60	vpr	81.54 MiB		-1	-1	0.06	27444	1	0.01	-1	-1	33048	-1	-1	0	1	0	0	success	v8.0.0-14568-g17635d73f7-dirty	release VTR_ASSERT_LEVEL=3	GNU 13.3.0 on Linux-6.8.0-79-generic x86_64	2026-01-26T13:01:30	srivatsan-Precision-Tower-5810	/home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/basic_ap	83492	1	1	0	2	0	1	2	17	17	289	-1	unnamed_device	-1	-1	2	2	3	0	0	3	81.5 MiB	0.39	0.00	0.271506	0.271506	-0.271506	-0.271506	nan	0.00	8.246e-06	5.192e-06	5.8952e-05	4.1049e-05	81.5 MiB	0.39	81.5 MiB	0.05	8	18	1	6.79088e+06	0	166176.	575.005	0.56	0.00107126	0.000939081	20206	45088	-1	18	1	1	1	110	40	0.7726	nan	-0.7726	-0.7726	0	0	202963.	702.294	0.01	0.00	0.04	-1	-1	0.01	0.000849277	0.000785489	
fixed_k6_frac_N8_22nm.xml	single_ff.v	common	1.81	vpr	81.61 MiB		-1	-1	0.06	27308	1	0.02	-1	-1	33072	-1	-1	1	2	0	0	success	v8.0.0-14568-g17635d73f7-dirty	release VTR_ASSERT_LEVEL=3	GNU 13.3.0 on Linux-6.8.0-79-generic x86_64	2026-01-26T13:01:30	srivatsan-Precision-Tower-5810	/home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/basic_ap	83568	2	1	2	3	1	3	4	17	17	289	-1	unnamed_device	-1	-1	20	20	9	0	2	7	81.6 MiB	0.40	0.00	0.942322	0.942322	-1.43857	-0.942322	0.942322	0.00	1.6892e-05	1.2101e-05	9.3269e-05	6.8795e-05	81.6 MiB	0.40	81.6 MiB	0.05	20	36	1	6.79088e+06	13472	414966.	1435.87	0.69	0.00120687	0.00104806	22510	95286	-1	27	1	2	2	75	22	0.942216	0.942216	-1.31306	-0.942216	0	0	503264.	1741.40	0.03	0.00	0.07	-1	-1	0.03	0.000920707	0.000840287	
fixed_k6_frac_N8_22nm.xml	ch_intrinsics.v	common	3.02	vpr	82.45 MiB		-1	-1	0.20	28976	3	0.07	-1	-1	36800	-1	-1	67	99	1	0	success	v8.0.0-14568-g17635d73f7-dirty	release VTR_ASSERT_LEVEL=3	GNU 13.3.0 on Linux-6.8.0-79-generic x86_64	2026-01-26T13:01:30	srivatsan-Precision-Tower-5810	/home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/basic_ap	84424	99	130	239	229	1	230	297	17	17	289	-1	unnamed_device	-1	-1	871.241	865	2277	260	259	1758	82.4 MiB	0.55	0.00	1.67081	1.67081	-126.355	-1.67081	1.67081	0.00	0.000688055	0.000616559	0.00378619	0.00349206	82.4 MiB	0.55	82.4 MiB	0.10	34	1959	15	6.79088e+06	1.45062e+06	618332.	2139.56	1.26	0.205303	0.182044	25102	150614	-1	1705	16	561	853	64681	22508	2.0466	2.0466	-143.089	-2.0466	-0.04337	-0.04337	787024.	2723.27	0.04	0.04	0.11	-1	-1	0.04	0.0556437	0.0499924	
fixed_k6_frac_N8_22nm.xml	diffeq1.v	common	10.62	vpr	84.77 MiB		-1	-1	0.27	33712	15	0.28	-1	-1	37344	-1	-1	48	162	0	5	success	v8.0.0-14568-g17635d73f7-dirty	release VTR_ASSERT_LEVEL=3	GNU 13.3.0 on Linux-6.8.0-79-generic x86_64	2026-01-26T13:01:30	srivatsan-Precision-Tower-5810	/home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/basic_ap	86804	162	96	805	258	1	673	311	17	17	289	-1	unnamed_device	-1	-1	6616.56	6374	28742	608	8059	20075	84.8 MiB	1.36	0.01	21.0322	20.3808	-1575.91	-20.3808	20.3808	0.00	0.00208737	0.00187048	0.0658355	0.0589437	84.8 MiB	1.36	84.8 MiB	0.21	52	12535	34	6.79088e+06	2.62666e+06	926341.	3205.33	6.49	1.09268	0.987011	28558	226646	-1	11123	22	3422	7573	1142118	320956	20.1072	20.1072	-1570.54	-20.1072	0	0	1.14541e+06	3963.36	0.06	0.30	0.17	-1	-1	0.06	0.320341	0.292364	
