arch	circuit	noc_flow	script_params	vtr_flow_elapsed_time	vtr_max_mem_stage	vtr_max_mem	error	num_clb	num_io	num_memories	num_mult	vpr_status	vpr_revision	vpr_build_info	vpr_compiler	vpr_compiled	hostname	rundir	max_vpr_mem	num_primary_inputs	num_primary_outputs	num_pre_packed_nets	num_pre_packed_blocks	num_netlist_clocks	num_post_packed_nets	num_post_packed_blocks	device_width	device_height	device_grid_tiles	device_limiting_resources	device_name	pack_mem	pack_time	initial_placed_wirelength_est	placed_wirelength_est	total_swap	accepted_swap	rejected_swap	aborted_swap	place_mem	place_time	place_quench_time	initial_placed_CPD_est	placed_CPD_est	placed_setup_TNS_est	placed_setup_WNS_est	placed_geomean_nonvirtual_intradomain_critical_path_delay_est	place_delay_matrix_lookup_time	place_quench_timing_analysis_time	place_quench_sta_time	place_total_timing_analysis_time	place_total_sta_time	min_chan_width	routed_wirelength	min_chan_width_route_success_iteration	logic_block_area_total	logic_block_area_used	min_chan_width_routing_area_total	min_chan_width_routing_area_per_tile	min_chan_width_route_time	min_chan_width_total_timing_analysis_time	min_chan_width_total_sta_time	crit_path_num_rr_graph_nodes	crit_path_num_rr_graph_edges	crit_path_collapsed_nodes	crit_path_routed_wirelength	crit_path_route_success_iteration	crit_path_total_nets_routed	crit_path_total_connections_routed	crit_path_total_heap_pushes	crit_path_total_heap_pops	critical_path_delay	geomean_nonvirtual_intradomain_critical_path_delay	setup_TNS	setup_WNS	hold_TNS	hold_WNS	crit_path_routing_area_total	crit_path_routing_area_per_tile	router_lookahead_computation_time	crit_path_route_time	crit_path_create_rr_graph_time	crit_path_create_intra_cluster_rr_graph_time	crit_path_tile_lookahead_computation_time	crit_path_router_lookahead_computation_time	crit_path_total_timing_analysis_time	crit_path_total_sta_time	NoC_agg_bandwidth	NoC_latency	NoC_n_met_latency_constraints	NoC_latency_overrun	NoC_congested_bw	NoC_congestion_ratio	NoC_n_congested_links	SAT_agg_bandwidth	SAT_latency	SAT_n_met_latency_constraints	SAT_latency_overrun	SAT_congested_bw	SAT_congestion_ratio	SAT_n_congested_links	
stratixiv_arch.timing_with_a_embedded_10X10_mesh_noc_topology.xml	complex_64_noc_star.blif	complex_64_noc_star_no_constraints.flows	common	3562.74	vpr	8.42 GiB		-1	2	-1	-1	success	5160a12-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	2025-06-17T12:01:36	agent-2	/home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	8827752	2	32	239118	200960	1	120427	7748	220	162	35640	-1	EP4SE820	2659.7 MiB	589.19	9.28754e+06	925013	8820658	3542705	5198835	79118	8620.9 MiB	762.74	5.81	29.2128	7.23069	-861903	-7.23069	7.23069	544.29	0.631128	0.538616	83.2759	68.0209	156	1101587	37	0	0	3.63383e+08	10195.9	1113.66	297.895	248.103	8675854	77817419	-1	1103321	18	285031	640166	116402296	26853225	7.39683	7.39683	-987243	-7.39683	0	0	4.60857e+08	12930.9	69.33	65.78	126.23	-1	-1	69.33	35.7758	31.5242	9.64e+07	5.45e-07	63	0	47	47	31 	-1	-1	-1	-1	-1	-1	-1	
stratixiv_arch.timing_with_a_embedded_10X10_mesh_noc_topology.xml	complex_64_noc_star.blif	complex_64_noc_star_2_bandwidths.flows	common	3794.05	vpr	8.42 GiB		-1	2	-1	-1	success	5160a12-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	2025-06-17T12:01:36	agent-2	/home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	8828312	2	32	239118	200960	1	120427	7748	220	162	35640	-1	EP4SE820	2661.1 MiB	592.25	9.78057e+06	934402	8820658	3504767	5245196	70695	8621.4 MiB	764.47	5.01	25.0821	7.27713	-848804	-7.27713	7.27713	540.32	0.641776	0.546794	84.4901	67.8667	154	1106536	44	0	0	3.59543e+08	10088.2	1347.53	351.732	292.093	8640214	77173879	-1	1113936	14	277210	621051	112832105	26126400	7.48472	7.48472	-976332	-7.48472	0	0	4.57197e+08	12828.2	77.51	60.29	123.79	-1	-1	77.51	30.58	27.0798	1.04e+08	5.43e-07	63	0	55.2	55.2	30 	-1	-1	-1	-1	-1	-1	-1	
stratixiv_arch.timing_with_a_embedded_10X10_mesh_noc_topology.xml	complex_64_noc_star.blif	complex_64_noc_star_6_bandwidths.flows	common	3827.96	vpr	8.42 GiB		-1	2	-1	-1	success	5160a12-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	2025-06-17T12:01:36	agent-2	/home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	8827388	2	32	239118	200960	1	120427	7748	220	162	35640	-1	EP4SE820	2660.3 MiB	592.84	9.81724e+06	962726	8973926	3612233	5290644	71049	8620.5 MiB	795.38	5.53	26.4	7.32561	-854693	-7.32561	7.32561	546.13	0.652804	0.557648	86.1913	70.557	154	1134844	45	0	0	3.59543e+08	10088.2	1350.12	348.948	290.529	8640214	77173879	-1	1142786	14	278221	625647	114098902	26419440	7.39187	7.39187	-932407	-7.39187	0	0	4.57197e+08	12828.2	74.72	58.89	123.61	-1	-1	74.72	30.3005	26.8306	2.6e+08	5.43e-07	63	0	202.6	202.6	45 	-1	-1	-1	-1	-1	-1	-1	
stratixiv_arch.timing_with_a_embedded_10X10_mesh_noc_topology.xml	complex_64_noc_star.blif	complex_64_noc_star_24_latency_constraints.flows	common	3780.64	vpr	8.42 GiB		-1	2	-1	-1	success	5160a12-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	2025-06-17T12:01:36	agent-2	/home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	8827520	2	32	239118	200960	1	120427	7748	220	162	35640	-1	EP4SE820	2659.9 MiB	563.41	1.01903e+07	951353	8897292	3546751	5277327	73214	8620.6 MiB	772.45	5.22	24.4553	7.23069	-851287	-7.23069	7.23069	543.16	0.661517	0.564474	84.394	69.0672	154	1126258	47	0	0	3.59543e+08	10088.2	1353.16	341.037	283.9	8640214	77173879	-1	1135602	14	276517	622118	113612581	26348171	7.6107	7.6107	-1.00223e+06	-7.6107	0	0	4.57197e+08	12828.2	77.01	58.26	123.56	-1	-1	77.01	30.2501	26.7941	9.6e+07	5.43e-07	63	1.15805e-23	47.2	47.2	30 	-1	-1	-1	-1	-1	-1	-1	
stratixiv_arch.timing_with_a_embedded_10X10_mesh_noc_topology.xml	complex_64_noc_star.blif	complex_64_noc_star_63_latency_constraints.flows	common	3743.67	vpr	8.42 GiB		-1	2	-1	-1	success	5160a12-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	2025-06-17T12:01:36	agent-2	/home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	8828520	2	32	239118	200960	1	120427	7748	220	162	35640	-1	EP4SE820	2660.1 MiB	585.19	9.7319e+06	963541	8744024	3580125	5095063	68836	8621.6 MiB	751.65	5.04	28.1315	7.27106	-853436	-7.27106	7.27106	537.77	0.720964	0.556151	86.1169	68.4997	154	1139877	34	0	0	3.59543e+08	10088.2	1314.20	325.062	268.328	8640214	77173879	-1	1147296	16	279520	626500	114990190	26623409	7.21992	7.21992	-956105	-7.21992	0	0	4.57197e+08	12828.2	79.45	62.60	124.23	-1	-1	79.45	33.3866	29.2368	9.6e+07	5.43e-07	62	2e-09	47.2	47.2	30 	-1	-1	-1	-1	-1	-1	-1	
