 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  routed_wirelength	  avg_routed_wirelength	  routed_wiresegment	  avg_routed_wiresegment	  total_nets_routed	  total_connections_routed	  total_heap_pushes	  total_heap_pops	  logic_block_area_total	  logic_block_area_used	  routing_area_total	  routing_area_per_tile	  crit_path_route_success_iteration	  num_rr_graph_nodes	  num_rr_graph_edges	  collapsed_nodes	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  create_rr_graph_time	  create_intra_cluster_rr_graph_time	  adding_internal_edges	  route_mem	  crit_path_route_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	  router_lookahead_mem	  tile_lookahead_computation_time	  router_lookahead_computation_time	 
 k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml	  raygentop.v	  common	  18.10	  vpr	  84.26 MiB	  	  0.49	  31568	  -1	  -1	  3	  1.10	  -1	  -1	  40400	  -1	  -1	  119	  214	  0	  8	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  86280	  214	  305	  2963	  2869	  1	  1465	  646	  19	  19	  361	  io	  auto	  42.9 MiB	  2.38	  11473	  279746	  97784	  164344	  17618	  84.3 MiB	  2.03	  0.03	  4.50048	  -2595.18	  -4.50048	  4.50048	  0.00	  0.00847397	  0.00785036	  0.847998	  0.78148	  -1	  -1	  -1	  -1	  19540	  13.4666	  5175	  3.56651	  4591	  11814	  1372016	  333143	  1.72706e+07	  9.58139e+06	  2.90560e+06	  8048.76	  12	  52798	  501983	  -1	  4.7575	  4.7575	  -2835.11	  -4.7575	  0	  0	  0.44	  -1	  -1	  84.3 MiB	  0.59	  1.16192	  1.07597	  84.3 MiB	  -1	  0.10	 
 k6_frac_N10_frac_chain_mem32K_40nm.xml	  raygentop.v	  common	  16.87	  vpr	  84.21 MiB	  	  0.49	  31612	  -1	  -1	  3	  1.08	  -1	  -1	  40360	  -1	  -1	  123	  214	  0	  8	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  86232	  214	  305	  2963	  2869	  1	  1444	  650	  19	  19	  361	  io	  auto	  43.2 MiB	  2.84	  11413	  231398	  76618	  140983	  13797	  84.2 MiB	  1.01	  0.02	  4.67106	  -2660.25	  -4.67106	  4.67106	  0.00	  0.0042158	  0.00385403	  0.364929	  0.335739	  -1	  -1	  -1	  -1	  17576	  12.2909	  4673	  3.26783	  3635	  8404	  916352	  219992	  1.72706e+07	  9.79696e+06	  2.71656e+06	  7525.11	  13	  49483	  447175	  -1	  4.79628	  4.79628	  -2823.47	  -4.79628	  0	  0	  0.33	  -1	  -1	  84.2 MiB	  0.32	  0.56686	  0.527395	  84.2 MiB	  -1	  0.09	 
 k6_frac_N10_mem32K_40nm.xml	  raygentop.v	  common	  19.25	  vpr	  79.38 MiB	  	  0.51	  32832	  -1	  -1	  8	  1.59	  -1	  -1	  40644	  -1	  -1	  117	  214	  0	  9	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  81284	  214	  305	  2625	  2741	  1	  1438	  645	  22	  22	  484	  mult_36	  auto	  38.5 MiB	  2.62	  11780	  287500	  97684	  170577	  19239	  79.4 MiB	  1.98	  0.03	  4.70477	  -2668	  -4.70477	  4.70477	  0.00	  0.00775198	  0.00716962	  0.832076	  0.767666	  -1	  -1	  -1	  -1	  18108	  12.7074	  4758	  3.33895	  3393	  7424	  854677	  202496	  2.50602e+07	  9.8696e+06	  3.71564e+06	  7676.94	  15	  65910	  614443	  -1	  4.88861	  4.88861	  -2835.89	  -4.88861	  0	  0	  0.57	  -1	  -1	  79.4 MiB	  0.53	  1.15898	  1.07234	  79.4 MiB	  -1	  0.13	 
 k6_N10_mem32K_40nm.xml	  raygentop.v	  common	  16.82	  vpr	  78.59 MiB	  	  0.51	  32832	  -1	  -1	  8	  1.69	  -1	  -1	  40844	  -1	  -1	  198	  214	  0	  9	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  80472	  214	  305	  2625	  2741	  1	  1415	  726	  22	  22	  484	  mult_36	  auto	  37.4 MiB	  1.14	  12153	  264867	  85581	  162230	  17056	  78.6 MiB	  1.77	  0.02	  4.91361	  -2793.64	  -4.91361	  4.91361	  0.00	  0.00766742	  0.0070794	  0.656327	  0.603669	  -1	  -1	  -1	  -1	  16547	  11.8024	  4369	  3.11626	  6679	  17662	  2743548	  596669	  2.50602e+07	  1.4235e+07	  3.52243e+06	  7277.74	  26	  57210	  572443	  -1	  4.90022	  4.90022	  -2862.69	  -4.90022	  0	  0	  0.55	  -1	  -1	  78.6 MiB	  0.94	  1.10615	  1.01763	  78.6 MiB	  -1	  0.12	 
 hard_fpu_arch_timing.xml	  raygentop.v	  common	  138.65	  vpr	  231.80 MiB	  	  0.99	  70388	  -1	  -1	  38	  69.46	  -1	  -1	  68188	  -1	  -1	  2403	  211	  -1	  -1	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  237368	  211	  305	  9491	  9796	  1	  6660	  2919	  55	  55	  3025	  clb	  auto	  80.5 MiB	  2.31	  66631	  1817043	  654938	  1126978	  35127	  231.8 MiB	  13.17	  0.11	  26.0917	  -6594.81	  -26.0917	  26.0917	  0.00	  0.0168338	  0.0140529	  2.38382	  2.05463	  -1	  -1	  -1	  -1	  110311	  16.5956	  28136	  4.23289	  74198	  194987	  16052984	  1871492	  6.31033e+06	  5.50811e+06	  1.22764e+07	  4058.32	  35	  255054	  2544855	  -1	  23.6419	  23.6419	  -6371.61	  -23.6419	  -0.0851	  -0.0851	  2.53	  -1	  -1	  231.8 MiB	  5.25	  4.12195	  3.55168	  231.8 MiB	  -1	  0.79	 
