##############################################
# Configuration file for running experiments
##############################################
script_params=-iterative_bb

# Path to directory of circuits to use
circuits_dir=benchmarks/verilog

# Path to directory of architectures to use
archs_dir=arch/timing

# Add circuits to list to sweep (basic bm)
circuit_list_add=multiclock_output_and_latch.v
circuit_list_add=multiclock_reader_writer.v
#circuit_list_add=multiclock_separate_and_latch.v # Error: Executable vpr failed

# Add architectures to list to sweep
arch_list_add=k6_frac_N10_mem32K_40nm.xml

# Parse info and how to parse
parse_file=vpr_standard.txt

# How to parse QoR info
qor_parse_file=qor_standard.txt

# Pass requirements
pass_requirements_file=pass_requirements.txt