vpr_status;output.txt;vpr_status=(.*)
total_wirelength;vpr_write_rr_graph.out;\s*Total wirelength:\s*(\d+)
#crit_path_delay_(mcw);vpr_write_rr_graph.out;Final critical path: (.*) ns
#crit_path_delay_(1.3mcw);vpr.crit_path.out;Final critical path: (.*) ns
#total_wirelength_(mcw);vpr_write_rr_graph.out;Total wirelength:\s*(\d+)
#total_wirelength_(1.3mcw);vpr.crit_path.out;Total wirelength:\s*(\d+)
total_runtime;vpr_write_rr_graph.out;The entire flow of VPR took (.*) seconds
#pack_time;vpr_write_rr_graph.out;Packing took (.*) seconds
#place_time;vpr_write_rr_graph.out;Placement took (.*) seconds
#route_time;vpr_write_rr_graph.out;Routing took (.*) seconds
#num_pre_packed_nets;vpr_write_rr_graph.out;Total Nets: (\d+)
#num_pre_packed_blocks;vpr_write_rr_graph.out;Total Blocks: (\d+)
#num_post_packed_nets;vpr_write_rr_graph.out;Netlist num_nets:\s*(\d+)
num_clb;vpr_write_rr_graph.out;Netlist clb blocks:\s*(\d+)
#num_io;vpr_write_rr_graph.out;Netlist inputs pins:\s*(\d+)
#num_outputs;vpr_write_rr_graph.out;Netlist output pins:\s*(\d+)
#num_memories;vpr_write_rr_graph.out;Netlist memory blocks:\s*(\d+)
#num_mult;vpr_write_rr_graph.out;Netlist mult_36 blocks:\s*(\d+)
min_chan_width;vpr_write_rr_graph.out;Best routing used a channel width factor of (\d+)
crit_path_delay;vpr.crit_path.out;Final critical path: (.*) ns

