#
############################################
# Configuration file for running experiments
##############################################

# Path to directory of circuits to use
circuits_dir=benchmarks/verilog/koios

# Path to directory of architectures to use
archs_dir=arch/COFFE_22nm

# Add circuits to list to sweep.
# Some of these benchmarks are designs with complex_dsp blocks 
# but in this task, we're running them without enabling these
# blocks (that is, the macro `complex_dsp` is not defined).
# Equivalent functionality is obtained through behavioral logic 
# that gets mapped to soft logic.
circuit_list_add=test.v

# Add architectures to list to sweep
arch_list_add=k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml

# Parse info and how to parse
parse_file=vpr_standard.txt

# How to parse QoR info
qor_parse_file=qor_standard.txt

# Pass requirements
pass_requirements_file=pass_requirements.txt

#Script parameters
script_params=-start odin -track_memory_usage 
