arch	circuit	script_params	vtr_flow_elapsed_time	vtr_max_mem_stage	vtr_max_mem	error	num_io	num_LAB	num_DSP	num_M9K	num_M144K	num_PLL	vpr_status	vpr_revision	vpr_build_info	vpr_compiler	vpr_compiled	hostname	rundir	max_vpr_mem	num_primary_inputs	num_primary_outputs	num_pre_packed_nets	num_pre_packed_blocks	num_netlist_clocks	num_post_packed_nets	num_post_packed_blocks	device_width	device_height	device_grid_tiles	device_limiting_resources	device_name	pack_mem	pack_time	placed_wirelength_est	place_mem	place_time	place_quench_time	placed_CPD_est	placed_setup_TNS_est	placed_setup_WNS_est	placed_geomean_nonvirtual_intradomain_critical_path_delay_est	place_delay_matrix_lookup_time	place_quench_timing_analysis_time	place_quench_sta_time	place_total_timing_analysis_time	place_total_sta_time	routed_wirelength	total_nets_routed	total_connections_routed	total_heap_pushes	total_heap_pops	logic_block_area_total	logic_block_area_used	routing_area_total	routing_area_per_tile	crit_path_route_success_iteration	critical_path_delay	geomean_nonvirtual_intradomain_critical_path_delay	setup_TNS	setup_WNS	hold_TNS	hold_WNS	route_mem	crit_path_route_time	crit_path_total_timing_analysis_time	crit_path_total_sta_time	router_lookahead_mem	router_lookahead_computation_time	
stratixiv_arch.timing.100to75_xy_chan_ratio.xml	neuron_stratixiv_arch_timing.blif	common	666.00	vpr	2.78 GiB		77	3123	89	136	0	0	success	v8.0.0-6485-gc0c5e0845-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 7.5.0 on Linux-4.15.0-167-generic x86_64	2022-09-09T10:16:53	betzgrp-wintermute.eecg.utoronto.ca	/home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks	2917088	42	35	119888	86875	1	51283	3425	129	96	12384	DSP	auto	1825.3 MiB	94.54	-1	2818.7 MiB	138.57	0.89	7.97362	-72252.4	-6.97362	6.1292	71.19	0.316488	0.265036	47.4293	38.7707	790807	102752	173723	233160785	42865652	0	0	2.45842e+08	19851.6	24	8.28155	6.68073	-122597	-7.28155	0	0	2818.7 MiB	50.04	65.9135	55.3592	2818.7 MiB	229.95	
stratixiv_arch.timing.100to75_xy_chan_ratio.xml	sparcT1_core_stratixiv_arch_timing.blif	common	763.21	vpr	2.31 GiB		310	4000	1	128	0	0	success	v8.0.0-6485-gc0c5e0845-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 7.5.0 on Linux-4.15.0-167-generic x86_64	2022-09-09T10:16:53	betzgrp-wintermute.eecg.utoronto.ca	/home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks	2425544	173	137	92814	91975	1	60944	4439	82	61	5002	LAB	auto	1795.5 MiB	227.36	-1	1939.9 MiB	273.72	1.87	8.16499	-547887	-7.16499	8.16499	33.12	0.379939	0.286722	51.3716	38.6899	1249692	200567	705146	561230580	54883942	0	0	9.89471e+07	19781.5	40	9.15192	9.15192	-683557	-8.15192	0	0	2182.3 MiB	95.17	83.0796	65.2711	1939.9 MiB	75.32	
stratixiv_arch.timing.100to75_xy_chan_ratio.xml	stereo_vision_stratixiv_arch_timing.blif	common	625.23	vpr	2.71 GiB		506	3246	76	113	0	0	success	v8.0.0-6485-gc0c5e0845-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 7.5.0 on Linux-4.15.0-167-generic x86_64	2022-09-09T10:16:53	betzgrp-wintermute.eecg.utoronto.ca	/home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks	2846464	172	334	127090	94090	3	61732	3941	129	96	12384	DSP	auto	1800.1 MiB	73.24	-1	2779.8 MiB	141.42	0.99	7.01501	-53978.9	-6.01501	3.02097	71.84	0.279143	0.212559	37.9584	29.4907	603779	126491	190928	173297927	18991101	0	0	2.45842e+08	19851.6	21	7.28139	3.2526	-76708.5	-6.28139	0	0	2779.8 MiB	31.44	51.8573	41.5389	2779.8 MiB	224.12	
stratixiv_arch.timing.100to75_xy_chan_ratio.xml	cholesky_mc_stratixiv_arch_timing.blif	common	1031.79	vpr	3.10 GiB		262	4765	59	444	16	0	success	v8.0.0-6485-gc0c5e0845-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 7.5.0 on Linux-4.15.0-167-generic x86_64	2022-09-09T10:16:53	betzgrp-wintermute.eecg.utoronto.ca	/home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks	3251772	111	151	140214	108592	1	66751	5546	125	93	11625	M9K	auto	2119.4 MiB	154.87	-1	2896.4 MiB	293.64	1.94	6.67378	-191300	-5.67378	6.67378	90.32	0.447369	0.35136	70.3989	55.3088	1138584	143813	318315	475790240	98713376	0	0	2.30669e+08	19842.5	24	7.43515	7.43515	-315232	-6.43515	0	0	2975.1 MiB	106.20	97.0149	78.1116	2896.4 MiB	269.30	
