############################################
# Configuration file for running experiments
##############################################

# Path to directory of circuits to use
circuits_dir=benchmarks/titan_blif/titan23/stratixiv

# Path to directory of SDCs to use
sdc_dir=benchmarks/titan_blif/titan23/stratixiv

# Path to directory of architectures to use
archs_dir=tasks/regression_tests/vtr_reg_nightly_test2/vpr_verify_custom_sb_diff_chan_width


# Add circuits to list to sweep
#To keep turn-around time reasonable only four relatively small designs are included

#Small benchmarks
circuit_list_add=neuron_stratixiv_arch_timing.blif
circuit_list_add=sparcT1_core_stratixiv_arch_timing.blif
circuit_list_add=stereo_vision_stratixiv_arch_timing.blif
circuit_list_add=cholesky_mc_stratixiv_arch_timing.blif

# Add architectures to list to sweep
arch_list_add=stratixiv_arch.timing.100to75_xy_chan_ratio.xml

# Parse info and how to parse
parse_file=vpr_titan.txt

# How to parse QoR info
qor_parse_file=qor_vpr_custom_sb.txt

# Pass requirements
pass_requirements_file=pass_requirements_vpr_custom_sb.txt

#The trget architecture has y-x channel width ratio of 3/4. The benchmarks are run at a fixed channel width of 342
#so that the average channel width of x-y channel would be equal to 300 
#Average channel width = (342 (x-channel width) + 342 * 0.75 (y-channel width)) / 2 ~= 300 
#Titan benchmarks are run at aaverage channel width of 300 to simulate a Stratix IV-like routing architecture
#A large number of routing iterations is set to ensure the router doesn't give up to easily on the larger benchmarks
#To be more run-time comparable to commercial tools like Quartus, we run with higher placer effort (inner_num=2) and lower astar_fac (1.0)
#Set a 24hr timeout so they don't run forever
script_params=-starting_stage vpr --route_chan_width 342 --max_router_iterations 400 --router_lookahead map -timeout 86400 --initial_pres_fac 1.0 --router_profiler_astar_fac 1.5 --seed 3
