###############################################################################
# Configuration file for running the MCNC benchmarks through the AP flow.
#
# The AP flow requires that each circuit contains fixed blocks and is fixed
# to a specific device size. The device sizes here were chosen to match the
# device sizes of the default VTR flow.
###############################################################################

# Path to directory of circuits to use
circuits_dir=benchmarks/verilog

# Path to directory of architectures to use
archs_dir=arch/timing

# Add architectures to list to sweep
arch_list_add=k6_frac_N10_frac_chain_mem32K_40nm.xml

# Add circuits to list to sweep
circuit_list_add=boundtop.v
circuit_list_add=ch_intrinsics.v
circuit_list_add=or1200.v
circuit_list_add=spree.v
circuit_list_add=stereovision3.v

# Constrain the circuits to their devices
circuit_constraint_list_add=(stereovision3.v,    device=vtr_extra_small)
circuit_constraint_list_add=(ch_intrinsics.v,    device=vtr_extra_small)
circuit_constraint_list_add=(spree.v,            device=vtr_extra_small)
circuit_constraint_list_add=(boundtop.v,         device=vtr_extra_small)
circuit_constraint_list_add=(or1200.v,           device=vtr_small)

# Constrain the circuits to their channel widths
#       1.3 * minW
circuit_constraint_list_add=(stereovision3.v,    route_chan_width=44)
circuit_constraint_list_add=(ch_intrinsics.v,    route_chan_width=52)
circuit_constraint_list_add=(spree.v,            route_chan_width=78)
circuit_constraint_list_add=(boundtop.v,         route_chan_width=50)
circuit_constraint_list_add=(or1200.v,           route_chan_width=124)

# Parse info and how to parse
parse_file=vpr_fixed_chan_width.txt

# How to parse QoR info
qor_parse_file=qor_ap_fixed_chan_width.txt

# Pass requirements
pass_requirements_file=pass_requirements_ap_fixed_chan_width.txt

# Pass the script params while writing the vpr constraints.
script_params=-track_memory_usage -crit_path_router_iterations 100 --analytical_place --route

