 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  num_io	  num_LAB	  num_DSP	  num_M9K	  num_M144K	  num_PLL	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  initial_placed_wirelength_est	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  initial_placed_CPD_est	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  routed_wirelength	  avg_routed_wirelength	  routed_wiresegment	  avg_routed_wiresegment	  total_nets_routed	  total_connections_routed	  total_heap_pushes	  total_heap_pops	  logic_block_area_total	  logic_block_area_used	  routing_area_total	  routing_area_per_tile	  crit_path_route_success_iteration	  num_rr_graph_nodes	  num_rr_graph_edges	  collapsed_nodes	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  create_rr_graph_time	  create_intra_cluster_rr_graph_time	  adding_internal_edges	  route_mem	  crit_path_route_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	  router_lookahead_mem	  tile_lookahead_computation_time	  router_lookahead_computation_time	 
 stratixiv_arch.timing.xml	  ucsb_152_tap_fir_stratixiv_arch_timing.blif	  common	  43.17	  vpr	  1.17 GiB	  	  42	  749	  0	  0	  0	  0	  success	  v8.0.0-13084-g071ad3865	  release IPO VTR_ASSERT_LEVEL=2	  GNU 13.3.0 on Linux-6.8.0-60-generic x86_64	  2025-06-17T09:37:40	  betzgrp-wintermute	  /home/pooladam/vtr-verilog-to-routing	  1222680	  13	  29	  26295	  20086	  1	  12646	  791	  40	  32	  1280	  -1	  EP4SGX110	  1079.4 MiB	  9.43	  239226	  74589	  256711	  51126	  200903	  4682	  1171.7 MiB	  9.03	  0.10	  5.63444	  5.01005	  -5462.84	  -4.01005	  2.84702	  0.01	  0.0339303	  0.0309881	  3.11714	  2.69686	  86284	  6.82411	  20731	  1.63959	  26252	  36217	  9399292	  1674437	  0	  0	  2.34683e+07	  18334.6	  13	  375646	  4004209	  -1	  5.41544	  2.87733	  -5740.36	  -4.41544	  0	  0	  4.76	  -1	  -1	  1171.7 MiB	  3.07	  4.57413	  4.0263	  1171.7 MiB	  -1	  2.71	 
