 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	  min_chan_width_total_timing_analysis_time	  min_chan_width_total_sta_time	  crit_path_num_rr_graph_nodes	  crit_path_num_rr_graph_edges	  crit_path_collapsed_nodes	  crit_path_routed_wirelength	  crit_path_route_success_iteration	  crit_path_total_nets_routed	  crit_path_total_connections_routed	  crit_path_total_heap_pushes	  crit_path_total_heap_pops	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  crit_path_routing_area_total	  crit_path_routing_area_per_tile	  router_lookahead_computation_time	  crit_path_route_time	  crit_path_create_rr_graph_time	  crit_path_create_intra_cluster_rr_graph_time	  crit_path_tile_lookahead_computation_time	  crit_path_router_lookahead_computation_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	 
 k6_frac_N10_frac_chain_mem32K_40nm.xml	  pulse_led.v	  common	  0.78	  vpr	  65.65 MiB	  	  -1	  -1	  0.33	  48464	  2	  0.02	  -1	  -1	  35352	  -1	  -1	  3	  9	  0	  0	  success	  33883b0-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.5.0 on Linux-5.10.35-v8 x86_64	  2024-06-21T17:24:52	  gh-actions-runner-vtr-auto-spawned151	  /root/vtr-verilog-to-routing/vtr-verilog-to-routing	  67224	  9	  3	  145	  109	  1	  14	  15	  5	  5	  25	  clb	  auto	  27.3 MiB	  0.02	  26	  177	  38	  133	  6	  65.6 MiB	  0.00	  0.00	  1.225	  -51.7876	  -1.225	  1.225	  0.01	  0.000107722	  9.7932e-05	  0.00192273	  0.00179338	  18	  44	  3	  323364	  161682	  19301.3	  772.054	  0.02	  0.00557779	  0.00521101	  1386	  3298	  -1	  52	  2	  13	  13	  323	  175	  1.225	  1.225	  -52.7217	  -1.225	  0	  0	  24611.1	  984.442	  0.00	  0.00	  0.00	  -1	  -1	  0.00	  0.00303037	  0.00287872	 
