 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	  min_chan_width_total_timing_analysis_time	  min_chan_width_total_sta_time	  crit_path_num_rr_graph_nodes	  crit_path_num_rr_graph_edges	  crit_path_collapsed_nodes	  crit_path_routed_wirelength	  crit_path_route_success_iteration	  crit_path_total_nets_routed	  crit_path_total_connections_routed	  crit_path_total_heap_pushes	  crit_path_total_heap_pops	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  crit_path_routing_area_total	  crit_path_routing_area_per_tile	  router_lookahead_computation_time	  crit_path_route_time	  crit_path_create_rr_graph_time	  crit_path_create_intra_cluster_rr_graph_time	  crit_path_tile_lookahead_computation_time	  crit_path_router_lookahead_computation_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	 
 k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml	  mkSMAdapter4B.v	  common	  24.06	  vpr	  81.98 MiB	  	  -1	  -1	  8.23	  52428	  5	  1.65	  -1	  -1	  39348	  -1	  -1	  153	  193	  5	  0	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  83948	  193	  205	  2718	  2652	  1	  1312	  556	  20	  20	  400	  memory	  auto	  41.1 MiB	  1.60	  10418	  229056	  84448	  119534	  25074	  82.0 MiB	  1.90	  0.02	  4.83454	  -2775.8	  -4.83454	  4.83454	  0.46	  0.00731993	  0.00661422	  0.783104	  0.70611	  -1	  -1	  -1	  -1	  76	  19968	  26	  2.07112e+07	  1.09858e+07	  2.02110e+06	  5052.76	  6.37	  2.80878	  2.50554	  52074	  423490	  -1	  18323	  15	  4834	  13018	  1039071	  232895	  5.13078	  5.13078	  -3018.62	  -5.13078	  -11.4108	  -0.29768	  2.51807e+06	  6295.18	  0.08	  0.37	  0.28	  -1	  -1	  0.08	  0.208582	  0.194928	 
