 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  routed_wirelength	  avg_routed_wirelength	  routed_wiresegment	  avg_routed_wiresegment	  total_nets_routed	  total_connections_routed	  total_heap_pushes	  total_heap_pops	  logic_block_area_total	  logic_block_area_used	  routing_area_total	  routing_area_per_tile	  crit_path_route_success_iteration	  num_rr_graph_nodes	  num_rr_graph_edges	  collapsed_nodes	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  create_rr_graph_time	  create_intra_cluster_rr_graph_time	  adding_internal_edges	  route_mem	  crit_path_route_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	  router_lookahead_mem	  tile_lookahead_computation_time	  router_lookahead_computation_time	 
 k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml	  raygentop.v	  common	  21.07	  vpr	  83.23 MiB	  	  -1	  -1	  4.77	  42300	  3	  0.69	  -1	  -1	  37768	  -1	  -1	  119	  236	  1	  6	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  85232	  236	  305	  3199	  3011	  1	  1524	  667	  19	  19	  361	  io	  auto	  42.1 MiB	  2.01	  12616	  262837	  90033	  158763	  14041	  83.2 MiB	  2.05	  0.03	  4.49369	  -2806.86	  -4.49369	  4.49369	  0.00	  0.00966118	  0.00895805	  0.835281	  0.769463	  -1	  -1	  -1	  -1	  21210	  13.9908	  5587	  3.68536	  5140	  14335	  1484939	  342866	  1.72706e+07	  9.33739e+06	  3.48716e+06	  9659.72	  17	  58198	  611635	  -1	  4.74754	  4.74754	  -2972.19	  -4.74754	  -0.452504	  -0.0215478	  0.56	  -1	  -1	  83.2 MiB	  0.75	  1.24852	  1.15404	  83.2 MiB	  -1	  0.11	 
 k6_frac_N10_frac_chain_mem32K_40nm.xml	  raygentop.v	  common	  22.29	  vpr	  83.17 MiB	  	  -1	  -1	  4.81	  42876	  3	  0.69	  -1	  -1	  37760	  -1	  -1	  129	  236	  1	  6	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  85164	  236	  305	  3199	  3011	  1	  1520	  677	  19	  19	  361	  io	  auto	  42.5 MiB	  2.79	  12380	  244299	  81189	  149577	  13533	  83.2 MiB	  1.87	  0.03	  4.65817	  -2859.2	  -4.65817	  4.65817	  0.00	  0.00866299	  0.00799175	  0.759534	  0.696955	  -1	  -1	  -1	  -1	  18640	  12.3280	  4948	  3.27249	  4102	  10444	  795414	  174592	  1.72706e+07	  9.87633e+06	  3.27351e+06	  9067.88	  17	  54883	  545335	  -1	  4.90067	  4.90067	  -2957.57	  -4.90067	  0	  0	  0.53	  -1	  -1	  83.2 MiB	  0.52	  1.13157	  1.04213	  83.2 MiB	  -1	  0.11	 
 k6_frac_N10_mem32K_40nm.xml	  raygentop.v	  common	  21.25	  vpr	  78.37 MiB	  	  -1	  -1	  5.87	  46604	  8	  0.98	  -1	  -1	  37824	  -1	  -1	  117	  235	  1	  6	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  80252	  235	  305	  2600	  2761	  1	  1433	  664	  19	  19	  361	  io	  auto	  37.8 MiB	  1.95	  11898	  272794	  88380	  167366	  17048	  78.4 MiB	  1.97	  0.03	  5.27944	  -2662.29	  -5.27944	  5.27944	  0.00	  0.00791855	  0.00732648	  0.794863	  0.732871	  -1	  -1	  -1	  -1	  18276	  12.8163	  4830	  3.38710	  3901	  10985	  836374	  182612	  1.72706e+07	  9.2296e+06	  3.27351e+06	  9067.88	  11	  53999	  544685	  -1	  5.16248	  5.16248	  -2765.43	  -5.16248	  -4.72457	  -0.168146	  0.53	  -1	  -1	  78.4 MiB	  0.41	  1.06143	  0.98183	  78.4 MiB	  -1	  0.10	 
 k6_N10_mem32K_40nm.xml	  raygentop.v	  common	  19.60	  vpr	  77.53 MiB	  	  -1	  -1	  6.09	  46284	  8	  0.99	  -1	  -1	  37804	  -1	  -1	  193	  235	  1	  6	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  79388	  235	  305	  2600	  2761	  1	  1403	  740	  19	  19	  361	  io clb	  auto	  36.9 MiB	  1.01	  12379	  261650	  87521	  161400	  12729	  77.5 MiB	  1.85	  0.03	  5.29995	  -2784.97	  -5.29995	  5.29995	  0.00	  0.0080991	  0.00750467	  0.669483	  0.615668	  -1	  -1	  -1	  -1	  17144	  12.2808	  4591	  3.28868	  6555	  20515	  2226044	  437383	  1.72706e+07	  1.33255e+07	  3.09093e+06	  8562.13	  21	  47590	  507115	  -1	  5.08294	  5.08294	  -2786.98	  -5.08294	  -12.7904	  -0.246958	  0.50	  -1	  -1	  77.5 MiB	  0.79	  1.07204	  0.98586	  77.5 MiB	  -1	  0.10	 
 hard_fpu_arch_timing.xml	  raygentop.v	  common	  237.56	  vpr	  393.52 MiB	  	  -1	  -1	  40.57	  186152	  41	  66.23	  -1	  -1	  72764	  -1	  -1	  3955	  235	  -1	  -1	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  402960	  235	  305	  20447	  20752	  1	  8685	  4495	  70	  70	  4900	  clb	  auto	  132.2 MiB	  4.43	  172483	  4046324	  1736449	  2271923	  37952	  393.5 MiB	  31.14	  0.27	  27.318	  -38433	  -27.318	  27.318	  0.02	  0.0410618	  0.0358058	  4.84871	  4.07471	  -1	  -1	  -1	  -1	  244983	  28.2271	  61861	  7.12766	  48213	  160239	  16322926	  1805170	  1.04337e+07	  9.0653e+06	  2.44008e+07	  4979.75	  20	  487536	  5108624	  -1	  25.2535	  25.2535	  -40276.6	  -25.2535	  -0.3404	  -0.0851	  6.81	  -1	  -1	  393.5 MiB	  5.85	  6.95088	  5.84398	  393.5 MiB	  -1	  1.57	 
