 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	 
 k4_N10_memSize16384_memData64.xml	  ch_intrinsics.v	  common	  1.71	  vpr	  62.29 MiB	  	  -1	  -1	  0.45	  18372	  3	  0.09	  -1	  -1	  33140	  -1	  -1	  71	  99	  1	  0	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  63780	  99	  130	  353	  483	  1	  222	  301	  13	  13	  169	  clb	  auto	  22.7 MiB	  0.06	  730	  30541	  5185	  13290	  12066	  62.3 MiB	  0.05	  0.00	  28	  1583	  11	  3.33e+06	  2.25e+06	  384474.	  2275.00	  0.18	 
 k4_N10_memSize16384_memData64.xml	  diffeq1.v	  common	  3.90	  vpr	  66.30 MiB	  	  -1	  -1	  0.72	  23492	  23	  0.30	  -1	  -1	  34028	  -1	  -1	  77	  162	  0	  5	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  67888	  162	  96	  1200	  1141	  1	  675	  340	  13	  13	  169	  clb	  auto	  25.9 MiB	  0.18	  5120	  92848	  24971	  61178	  6699	  66.3 MiB	  0.19	  0.00	  52	  9637	  13	  3.33e+06	  2.76e+06	  671819.	  3975.26	  1.14	 
 k4_N10_memSize16384_memData64.xml	  single_wire.v	  common	  2.10	  vpr	  59.81 MiB	  	  -1	  -1	  0.16	  16372	  1	  0.17	  -1	  -1	  29680	  -1	  -1	  0	  1	  0	  0	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  61244	  1	  1	  1	  2	  0	  1	  2	  3	  3	  9	  -1	  auto	  21.3 MiB	  0.00	  2	  3	  0	  3	  0	  59.8 MiB	  0.01	  0.00	  2	  1	  1	  30000	  0	  1489.46	  165.495	  0.01	 
 k4_N10_memSize16384_memData64.xml	  single_ff.v	  common	  2.13	  vpr	  59.62 MiB	  	  -1	  -1	  0.15	  16244	  1	  0.17	  -1	  -1	  29552	  -1	  -1	  1	  2	  0	  0	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  61048	  2	  1	  3	  4	  1	  3	  4	  3	  3	  9	  -1	  auto	  21.2 MiB	  0.00	  6	  9	  6	  0	  3	  59.6 MiB	  0.01	  0.00	  16	  5	  1	  30000	  30000	  2550.78	  283.420	  0.01	 
