###==== BEGIN Clocks
create_clock -name {free_clk} [get_ports {free_clk}] -period {20.000} -waveform {0.000 10.000}
create_clock -name {ref_clk} [get_ports {ref_clk_p}] -period {40.0} -waveform {0 20.0}
###==== END Clocks

###==== BEGIN "Generated Clocks"
create_generated_clock -name {rst_clk} -source [get_ports {ref_clk_p}] [get_pins {I_ips_ddr_top.u_ddrphy_top.rst_clk_gpll/clkout0}] -master_clock [get_clocks {ref_clk}] -multiply_by {64} -divide_by {64}
create_generated_clock -name {ddrphy_sysclk} -source [get_ports {ref_clk_p}] [get_pins {I_ips_ddr_top.u_ddrphy_top.ddrphy_gpll/clkout0}] -master_clock [get_clocks {ref_clk}] -multiply_by {64} -divide_by {16}
create_generated_clock -name {phy_dq_clk_0} -source [get_ports {ref_clk_p}] [get_pins {I_ips_ddr_top.u_ddrphy_top.ddrphy_slice_top.i_dqs_bank[0].ddrphy_ppll/clkoutphy}] -master_clock [get_clocks {ref_clk}] -multiply_by {64} -divide_by {2}
create_generated_clock -name {phy_dq_sysclk_0} -source [get_pins {I_ips_ddr_top.u_ddrphy_top.ddrphy_slice_top.i_dqs_bank[0].ddrphy_ppll/clkoutphy}] [get_pins {I_ips_ddr_top.u_ddrphy_top.ddrphy_slice_top.i_dqs_bank[0].u_ddrphy_ioclkdiv/CLKDIVOUT}] -master_clock [get_clocks {phy_dq_clk_0}] -edges {5 13 21} -edge_shift {0 0 0}
set_multicycle_path 2 -from [get_clocks ddrphy_sysclk] -to [get_clocks phy_dq_sysclk_0]
create_generated_clock -name {phy_dq_clk_1} -source [get_ports {ref_clk_p}] [get_pins {I_ips_ddr_top.u_ddrphy_top.ddrphy_slice_top.i_dqs_bank[1].ddrphy_ppll/clkoutphy}] -master_clock [get_clocks {ref_clk}] -multiply_by {64} -divide_by {2}
create_generated_clock -name {phy_dq_sysclk_1} -source [get_pins {I_ips_ddr_top.u_ddrphy_top.ddrphy_slice_top.i_dqs_bank[1].ddrphy_ppll/clkoutphy}] [get_pins {I_ips_ddr_top.u_ddrphy_top.ddrphy_slice_top.i_dqs_bank[1].u_ddrphy_ioclkdiv/CLKDIVOUT}] -master_clock [get_clocks {phy_dq_clk_1}] -edges {5 13 21} -edge_shift {0 0 0}
set_multicycle_path 2 -from [get_clocks ddrphy_sysclk] -to [get_clocks phy_dq_sysclk_1]
set_clock_uncertainty {0.4} -from [get_clocks {ddrphy_sysclk}] -to [get_clocks {phy_dq_sysclk_0}] -setup -hold
set_clock_uncertainty {0.4} -from [get_clocks {phy_dq_sysclk_0}] -to [get_clocks {ddrphy_sysclk}] -setup -hold
set_clock_uncertainty {0.4} -from [get_clocks {ddrphy_sysclk}] -to [get_clocks {phy_dq_sysclk_1}] -setup -hold
set_clock_uncertainty {0.4} -from [get_clocks {phy_dq_sysclk_1}] -to [get_clocks {ddrphy_sysclk}] -setup -hold
set_clock_groups -name free_clk -asynchronous -group [get_clocks {free_clk}]
set_clock_groups -name ref_clk -asynchronous -group [get_clocks {ref_clk}]
set_clock_groups -name rst_clk -asynchronous -group [get_clocks {rst_clk}]
set_clock_groups -name phy_dq_clk_0 -asynchronous -group [get_clocks {phy_dq_clk_0}]
set_clock_groups -name phy_dq_clk_1 -asynchronous -group [get_clocks {phy_dq_clk_1}]
###==== END "Generated Clocks"

###==== BEGIN "Inputs/Outpusts"
###==== END "Inputs/Outpusts"

###==== BEGIN "Delay Paths"
###==== END "Delay Paths"

###==== BEGIN Logical
define_attribute {i:I_ips_ddr_top.u_ddrphy_top.u_ddrphy_cpd} {PAP_LOC} {DDRPHY_CPD_297_4}
define_attribute {i:I_ips_ddr_top.u_ddrphy_top.ddrphy_reset_ctrl.ddrphy_ioclk_gate[0]} {PAP_LOC} {CLMA_285_54:FF3}
define_attribute {i:I_ips_ddr_top.u_ddrphy_top.ddrphy_reset_ctrl.ddrphy_ioclk_gate[1]} {PAP_LOC} {CLMA_285_360:FF3}
###==== END Logical

###==== BEGIN Io Table
define_attribute {p:mem_dq[0]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[0]} {PAP_IO_LOC} {L6}
define_attribute {p:mem_dq[0]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[0]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[0]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[0]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[0]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[0]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[0]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[0]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[0]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[0]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[1]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[1]} {PAP_IO_LOC} {M5}
define_attribute {p:mem_dq[1]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[1]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[1]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[1]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[1]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[1]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[1]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[1]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[1]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[1]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[2]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[2]} {PAP_IO_LOC} {M6}
define_attribute {p:mem_dq[2]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[2]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[2]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[2]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[2]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[2]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[2]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[2]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[2]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[2]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[3]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[3]} {PAP_IO_LOC} {N2}
define_attribute {p:mem_dq[3]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[3]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[3]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[3]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[3]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[3]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[3]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[3]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[3]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[3]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[4]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[4]} {PAP_IO_LOC} {N3}
define_attribute {p:mem_dq[4]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[4]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[4]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[4]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[4]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[4]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[4]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[4]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[4]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[4]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[5]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[5]} {PAP_IO_LOC} {N4}
define_attribute {p:mem_dq[5]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[5]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[5]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[5]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[5]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[5]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[5]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[5]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[5]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[5]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[6]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[6]} {PAP_IO_LOC} {N5}
define_attribute {p:mem_dq[6]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[6]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[6]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[6]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[6]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[6]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[6]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[6]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[6]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[6]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[7]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[7]} {PAP_IO_LOC} {P1}
define_attribute {p:mem_dq[7]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[7]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[7]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[7]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[7]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[7]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[7]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[7]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[7]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[7]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dqs[0]} {PAP_IO_DIRECTION} {INOUT}      
define_attribute {p:mem_dqs[0]} {PAP_IO_LOC} {P4}
define_attribute {p:mem_dqs[0]} {PAP_IO_VCCIO} {1.5}            
define_attribute {p:mem_dqs[0]} {PAP_IO_STANDARD} {SSTL15D_I}   
define_attribute {p:mem_dqs[0]} {PAP_IO_DRIVE} {8.9}            
define_attribute {p:mem_dqs[0]} {PAP_IO_UNUSED} {TRUE}          
define_attribute {p:mem_dqs[0]} {PAP_IO_SLEW} {FAST}            
define_attribute {p:mem_dqs[0]} {PAP_IO_VREF_MODE} {INT}        
define_attribute {p:mem_dqs[0]} {PAP_IO_VREF_MODE_VALUE} {0.5}  
define_attribute {p:mem_dqs[0]} {PAP_IO_DDR_TERM_MODE} {ON}     
define_attribute {p:mem_dqs[0]} {PAP_IO_DDR_RES} {60}           
define_attribute {p:mem_dqs[0]} {PAP_IO_CP_DYN_TERM} {ON}       
define_attribute {p:mem_dqs_n[0]} {PAP_IO_DIRECTION} {INOUT}      
define_attribute {p:mem_dqs_n[0]} {PAP_IO_LOC} {D1}
define_attribute {p:mem_dqs_n[0]} {PAP_IO_VCCIO} {1.5}            
define_attribute {p:mem_dqs_n[0]} {PAP_IO_STANDARD} {SSTL15D_I}   
define_attribute {p:mem_dqs_n[0]} {PAP_IO_DRIVE} {8.9}            
define_attribute {p:mem_dqs_n[0]} {PAP_IO_UNUSED} {TRUE}          
define_attribute {p:mem_dqs_n[0]} {PAP_IO_SLEW} {FAST}            
define_attribute {p:mem_dqs_n[0]} {PAP_IO_VREF_MODE} {INT}        
define_attribute {p:mem_dqs_n[0]} {PAP_IO_VREF_MODE_VALUE} {0.5}  
define_attribute {p:mem_dqs_n[0]} {PAP_IO_DDR_TERM_MODE} {ON}     
define_attribute {p:mem_dqs_n[0]} {PAP_IO_DDR_RES} {60}           
define_attribute {p:mem_dqs_n[0]} {PAP_IO_CP_DYN_TERM} {ON}       
define_attribute {p:mem_dm[0]} {PAP_IO_DIRECTION} {OUTPUT}       
define_attribute {p:mem_dm[0]} {PAP_IO_LOC} {P5}
define_attribute {p:mem_dm[0]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_dm[0]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_dm[0]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_dm[0]} {PAP_IO_UNUSED} {TRUE}            
define_attribute {p:mem_dm[0]} {PAP_IO_SLEW} {FAST}              
define_attribute {p:mem_dq[8]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[8]} {PAP_IO_LOC} {J4}
define_attribute {p:mem_dq[8]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[8]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[8]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[8]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[8]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[8]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[8]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[8]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[8]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[8]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[9]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[9]} {PAP_IO_LOC} {J6}
define_attribute {p:mem_dq[9]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[9]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[9]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[9]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[9]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[9]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[9]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[9]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[9]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[9]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[10]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[10]} {PAP_IO_LOC} {K3}
define_attribute {p:mem_dq[10]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[10]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[10]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[10]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[10]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[10]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[10]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[10]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[10]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[10]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[11]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[11]} {PAP_IO_LOC} {K4}
define_attribute {p:mem_dq[11]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[11]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[11]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[11]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[11]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[11]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[11]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[11]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[11]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[11]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[12]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[12]} {PAP_IO_LOC} {K6}
define_attribute {p:mem_dq[12]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[12]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[12]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[12]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[12]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[12]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[12]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[12]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[12]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[12]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[13]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[13]} {PAP_IO_LOC} {L4}
define_attribute {p:mem_dq[13]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[13]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[13]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[13]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[13]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[13]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[13]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[13]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[13]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[13]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[14]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[14]} {PAP_IO_LOC} {L3}
define_attribute {p:mem_dq[14]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[14]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[14]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[14]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[14]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[14]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[14]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[14]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[14]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[14]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dq[15]} {PAP_IO_DIRECTION} {INOUT}       
define_attribute {p:mem_dq[15]} {PAP_IO_LOC} {L4}
define_attribute {p:mem_dq[15]} {PAP_IO_VCCIO} {1.5}     
define_attribute {p:mem_dq[15]} {PAP_IO_STANDARD} {SSTL15_I}     
define_attribute {p:mem_dq[15]} {PAP_IO_DRIVE} {8.9}             
define_attribute {p:mem_dq[15]} {PAP_IO_UNUSED} {TRUE}           
define_attribute {p:mem_dq[15]} {PAP_IO_SLEW} {FAST}             
define_attribute {p:mem_dq[15]} {PAP_IO_VREF_MODE} {INT}         
define_attribute {p:mem_dq[15]} {PAP_IO_VREF_MODE_VALUE} {0.5}   
define_attribute {p:mem_dq[15]} {PAP_IO_DDR_TERM_MODE} {ON}      
define_attribute {p:mem_dq[15]} {PAP_IO_DDR_RES} {60}            
define_attribute {p:mem_dq[15]} {PAP_IO_CP_DYN_TERM} {ON}        
define_attribute {p:mem_dqs[1]} {PAP_IO_DIRECTION} {INOUT}      
define_attribute {p:mem_dqs[1]} {PAP_IO_LOC} {M1}
define_attribute {p:mem_dqs[1]} {PAP_IO_VCCIO} {1.5}            
define_attribute {p:mem_dqs[1]} {PAP_IO_STANDARD} {SSTL15D_I}   
define_attribute {p:mem_dqs[1]} {PAP_IO_DRIVE} {8.9}            
define_attribute {p:mem_dqs[1]} {PAP_IO_UNUSED} {TRUE}          
define_attribute {p:mem_dqs[1]} {PAP_IO_SLEW} {FAST}            
define_attribute {p:mem_dqs[1]} {PAP_IO_VREF_MODE} {INT}        
define_attribute {p:mem_dqs[1]} {PAP_IO_VREF_MODE_VALUE} {0.5}  
define_attribute {p:mem_dqs[1]} {PAP_IO_DDR_TERM_MODE} {ON}     
define_attribute {p:mem_dqs[1]} {PAP_IO_DDR_RES} {60}           
define_attribute {p:mem_dqs[1]} {PAP_IO_CP_DYN_TERM} {ON}       
define_attribute {p:mem_dqs_n[1]} {PAP_IO_DIRECTION} {INOUT}      
define_attribute {p:mem_dqs_n[1]} {PAP_IO_LOC} {L1}
define_attribute {p:mem_dqs_n[1]} {PAP_IO_VCCIO} {1.5}            
define_attribute {p:mem_dqs_n[1]} {PAP_IO_STANDARD} {SSTL15D_I}   
define_attribute {p:mem_dqs_n[1]} {PAP_IO_DRIVE} {8.9}            
define_attribute {p:mem_dqs_n[1]} {PAP_IO_UNUSED} {TRUE}          
define_attribute {p:mem_dqs_n[1]} {PAP_IO_SLEW} {FAST}            
define_attribute {p:mem_dqs_n[1]} {PAP_IO_VREF_MODE} {INT}        
define_attribute {p:mem_dqs_n[1]} {PAP_IO_VREF_MODE_VALUE} {0.5}  
define_attribute {p:mem_dqs_n[1]} {PAP_IO_DDR_TERM_MODE} {ON}     
define_attribute {p:mem_dqs_n[1]} {PAP_IO_DDR_RES} {60}           
define_attribute {p:mem_dqs_n[1]} {PAP_IO_CP_DYN_TERM} {ON}       
define_attribute {p:mem_dm[1]} {PAP_IO_DIRECTION} {OUTPUT}       
define_attribute {p:mem_dm[1]} {PAP_IO_LOC} {M2}
define_attribute {p:mem_dm[1]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_dm[1]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_dm[1]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_dm[1]} {PAP_IO_UNUSED} {TRUE}            
define_attribute {p:mem_dm[1]} {PAP_IO_SLEW} {FAST}              
define_attribute {p:mem_rst_n} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_rst_n} {PAP_IO_LOC} {T3}
define_attribute {p:mem_rst_n} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_rst_n} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_rst_n} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_rst_n} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_rst_n} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_cke} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_cke} {PAP_IO_LOC} {W4}
define_attribute {p:mem_cke} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_cke} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_cke} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_cke} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_cke} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_ck} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_ck} {PAP_IO_LOC} {Y4}
define_attribute {p:mem_ck} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_ck} {PAP_IO_STANDARD} {SSTL15D_I}  
define_attribute {p:mem_ck} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_ck} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_ck} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_ck_n} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_ck_n} {PAP_IO_LOC} {AA4}
define_attribute {p:mem_ck_n} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_ck_n} {PAP_IO_STANDARD} {SSTL15D_I}  
define_attribute {p:mem_ck_n} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_ck_n} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_ck_n} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_cs_n} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_cs_n} {PAP_IO_LOC} {V5}
define_attribute {p:mem_cs_n} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_cs_n} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_cs_n} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_cs_n} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_cs_n} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_cas_n} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_cas_n} {PAP_IO_LOC} {U6}
define_attribute {p:mem_cas_n} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_cas_n} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_cas_n} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_cas_n} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_cas_n} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_ras_n} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_ras_n} {PAP_IO_LOC} {W5}
define_attribute {p:mem_ras_n} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_ras_n} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_ras_n} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_ras_n} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_ras_n} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_we_n} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_we_n} {PAP_IO_LOC} {W6}
define_attribute {p:mem_we_n} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_we_n} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_we_n} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_we_n} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_we_n} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_odt} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_odt} {PAP_IO_LOC} {R6}
define_attribute {p:mem_odt} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_odt} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_odt} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_odt} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_odt} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_ba[2]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_ba[2]} {PAP_IO_LOC} {AB5}
define_attribute {p:mem_ba[2]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_ba[2]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_ba[2]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_ba[2]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_ba[2]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_ba[1]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_ba[1]} {PAP_IO_LOC} {AA5}
define_attribute {p:mem_ba[1]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_ba[1]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_ba[1]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_ba[1]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_ba[1]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_ba[0]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_ba[0]} {PAP_IO_LOC} {AA3}
define_attribute {p:mem_ba[0]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_ba[0]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_ba[0]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_ba[0]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_ba[0]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[0]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[0]} {PAP_IO_LOC} {T1}
define_attribute {p:mem_a[0]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[0]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[0]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[0]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[0]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[1]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[1]} {PAP_IO_LOC} {U1}
define_attribute {p:mem_a[1]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[1]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[1]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[1]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[1]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[2]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[2]} {PAP_IO_LOC} {U2}
define_attribute {p:mem_a[2]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[2]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[2]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[2]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[2]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[3]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[3]} {PAP_IO_LOC} {V2}
define_attribute {p:mem_a[3]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[3]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[3]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[3]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[3]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[4]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[4]} {PAP_IO_LOC} {R3}
define_attribute {p:mem_a[4]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[4]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[4]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[4]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[4]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[5]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[5]} {PAP_IO_LOC} {R2}
define_attribute {p:mem_a[5]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[5]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[5]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[5]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[5]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[6]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[6]} {PAP_IO_LOC} {W2}
define_attribute {p:mem_a[6]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[6]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[6]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[6]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[6]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[7]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[7]} {PAP_IO_LOC} {Y2}
define_attribute {p:mem_a[7]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[7]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[7]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[7]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[7]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[8]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[8]} {PAP_IO_LOC} {W1}
define_attribute {p:mem_a[8]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[8]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[8]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[8]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[8]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[9]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[9]} {PAP_IO_LOC} {Y1}
define_attribute {p:mem_a[9]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[9]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[9]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[9]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[9]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[10]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[10]} {PAP_IO_LOC} {U3}
define_attribute {p:mem_a[10]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[10]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[10]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[10]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[10]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[11]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[11]} {PAP_IO_LOC} {AA1}
define_attribute {p:mem_a[11]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[11]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[11]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[11]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[11]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[12]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[12]} {PAP_IO_LOC} {AB1}
define_attribute {p:mem_a[12]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[12]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[12]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[12]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[12]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[13]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[13]} {PAP_IO_LOC} {AB3}
define_attribute {p:mem_a[13]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[13]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[13]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[13]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[13]} {PAP_IO_SLEW} {FAST}                  
define_attribute {p:mem_a[14]} {PAP_IO_DIRECTION} {OUTPUT}           
define_attribute {p:mem_a[14]} {PAP_IO_LOC} {AB2}
define_attribute {p:mem_a[14]} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:mem_a[14]} {PAP_IO_STANDARD} {SSTL15_I}  
define_attribute {p:mem_a[14]} {PAP_IO_DRIVE} {8.9}       
define_attribute {p:mem_a[14]} {PAP_IO_UNUSED} {TRUE}                
define_attribute {p:mem_a[14]} {PAP_IO_SLEW} {FAST}         
define_attribute {p:ddr_init_done} {PAP_IO_DIRECTION} {OUTPUT}    
define_attribute {p:ddr_init_done} {PAP_IO_LOC} {H17}          
define_attribute {p:ddr_init_done} {PAP_IO_VCCIO} {1.5}           
define_attribute {p:ddr_init_done} {PAP_IO_STANDARD} {LVCMOS15}   
define_attribute {p:ddr_init_done} {PAP_IO_DRIVE} {8}             
define_attribute {p:ddr_init_done} {PAP_IO_PULLUP} {TRUE}         
define_attribute {p:ddr_init_done} {PAP_IO_SLEW} {FAST}           
define_attribute {p:ddrphy_cpd_lock} {PAP_IO_DIRECTION} {OUTPUT}  
define_attribute {p:ddrphy_cpd_lock} {PAP_IO_LOC} {G16}        
define_attribute {p:ddrphy_cpd_lock} {PAP_IO_VCCIO} {1.5}         
define_attribute {p:ddrphy_cpd_lock} {PAP_IO_STANDARD} {LVCMOS15} 
define_attribute {p:ddrphy_cpd_lock} {PAP_IO_DRIVE} {8}           
define_attribute {p:ddrphy_cpd_lock} {PAP_IO_PULLUP} {TRUE}       
define_attribute {p:ddrphy_cpd_lock} {PAP_IO_SLEW} {FAST}         
define_attribute {p:err_flag_led} {PAP_IO_DIRECTION} {OUTPUT}    
define_attribute {p:err_flag_led} {PAP_IO_LOC} {G15}          
define_attribute {p:err_flag_led} {PAP_IO_VCCIO} {1.5}           
define_attribute {p:err_flag_led} {PAP_IO_STANDARD} {LVCMOS15}   
define_attribute {p:err_flag_led} {PAP_IO_DRIVE} {8}             
define_attribute {p:err_flag_led} {PAP_IO_PULLUP} {TRUE}         
define_attribute {p:err_flag_led} {PAP_IO_SLEW} {FAST}           
define_attribute {p:heart_beat_led} {PAP_IO_DIRECTION} {OUTPUT}  
define_attribute {p:heart_beat_led} {PAP_IO_LOC} {G13}        
define_attribute {p:heart_beat_led} {PAP_IO_VCCIO} {1.5}         
define_attribute {p:heart_beat_led} {PAP_IO_STANDARD} {LVCMOS15} 
define_attribute {p:heart_beat_led} {PAP_IO_DRIVE} {8}           
define_attribute {p:heart_beat_led} {PAP_IO_PULLUP} {TRUE}       
define_attribute {p:heart_beat_led} {PAP_IO_SLEW} {FAST}         
define_attribute {p:pll_lock} {PAP_IO_DIRECTION} {OUTPUT}   
define_attribute {p:pll_lock} {PAP_IO_LOC} {H14}         
define_attribute {p:pll_lock} {PAP_IO_VCCIO} {1.5}          
define_attribute {p:pll_lock} {PAP_IO_STANDARD} {LVCMOS15}  
define_attribute {p:pll_lock} {PAP_IO_DRIVE} {8}            
define_attribute {p:pll_lock} {PAP_IO_PULLUP} {TRUE}        
define_attribute {p:pll_lock} {PAP_IO_SLEW} {FAST}          
define_attribute {p:free_clk} {PAP_IO_DIRECTION} {INPUT}     
define_attribute {p:free_clk} {PAP_IO_LOC} {W19}          
define_attribute {p:free_clk} {PAP_IO_VCCIO} {3.3}           
define_attribute {p:free_clk} {PAP_IO_STANDARD} {LVCMOS33}   
define_attribute {p:free_clk} {PAP_IO_UNUSED} {TRUE}         
define_attribute {p:ref_clk_p} {PAP_IO_DIRECTION} {INPUT}     
define_attribute {p:ref_clk_p} {PAP_IO_LOC} {J19}          
define_attribute {p:ref_clk_p} {PAP_IO_VCCIO} {1.5}           
define_attribute {p:ref_clk_p} {PAP_IO_STANDARD} {SSTL15D_I}  
define_attribute {p:ref_clk_p} {PAP_IO_UNUSED} {TRUE}         
define_attribute {p:ref_clk_n} {PAP_IO_DIRECTION} {INPUT}     
define_attribute {p:ref_clk_n} {PAP_IO_LOC} {H19}          
define_attribute {p:ref_clk_n} {PAP_IO_VCCIO} {1.5}           
define_attribute {p:ref_clk_n} {PAP_IO_STANDARD} {SSTL15D_I}  
define_attribute {p:ref_clk_n} {PAP_IO_UNUSED} {TRUE}         
define_attribute {p:rst_board} {PAP_IO_DIRECTION} {INPUT}   
define_attribute {p:rst_board} {PAP_IO_LOC} {V7}        
define_attribute {p:rst_board} {PAP_IO_VCCIO} {3.3}         
define_attribute {p:rst_board} {PAP_IO_STANDARD} {LVCMOS33} 
define_attribute {p:rst_board} {PAP_IO_UNUSED} {TRUE}       
define_attribute {p:uart_txd} {PAP_IO_DIRECTION} {OUTPUT}  
define_attribute {p:uart_txd} {PAP_IO_LOC} {AB18}        
define_attribute {p:uart_txd} {PAP_IO_VCCIO} {3.3}         
define_attribute {p:uart_txd} {PAP_IO_STANDARD} {LVCMOS33} 
define_attribute {p:uart_txd} {PAP_IO_DRIVE} {4}           
define_attribute {p:uart_txd} {PAP_IO_UNUSED} {TRUE}       
define_attribute {p:uart_txd} {PAP_IO_SLEW} {FAST}         
define_attribute {p:uart_rxd} {PAP_IO_DIRECTION} {INPUT}   
define_attribute {p:uart_rxd} {PAP_IO_LOC} {AA18}        
define_attribute {p:uart_rxd} {PAP_IO_VCCIO} {3.3}         
define_attribute {p:uart_rxd} {PAP_IO_STANDARD} {LVCMOS33} 
define_attribute {p:uart_rxd} {PAP_IO_PULLUP} {TRUE}       
###==== END Io Table
