Generated by Fabric Compiler ( version 2022.2-SP6.4 <build 146967> ) at Wed Jan  8 10:17:10 2025


Inputs and Outputs :
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
| Type       | File Name                                                                                                                                 
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
| Input      | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/prbs15_64bit_v1_0.v                                                        
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/prbs31_128bit_v1_0.v                                                       
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/axi_bist_top_v1_0.v                                                        
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/test_main_ctrl_v1_0.v                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/test_rd_ctrl_v1_0.v                                                        
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/test_wr_ctrl_v1_0.v                                                        
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/uart_rd_lock.v                                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/test_ddr.v                                                                 
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/uart_ctrl_32bit/ips2l_clk_gen_32bit.v                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/uart_ctrl_32bit/ips2l_cmd_parser_32bit.v                                   
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/uart_ctrl_32bit/ips2l_seu_rs232_intf.v                                     
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/uart_ctrl_32bit/ips2l_seu_uart_rx.v                                        
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/uart_ctrl_32bit/ips2l_seu_uart_tx.v                                        
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/uart_ctrl_32bit/ips2l_uart_ctrl_32bit.v                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/uart_ctrl_32bit/ips2l_uart_ctrl_top_32bit.v                                
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/uart_ctrl_32bit/ips2l_ver_ctrl_32bit.v                                     
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/adc/adc.v                                                                  
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/example_design/rtl/adc/adc_ctrl.v                                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ips2l_rst_sync_v1_3.vp                                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_wrlvl_v1_0.vp                                                         
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_wrcal_v1_7.vp                                                         
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_wdata_path_adj_v1_10.vp                                               
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_upcal_v1_0.vp                                                         
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_training_ctrl_v1_0.vp                                                 
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_slice_rddata_align_v1_0.vp                                            
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_reset_ctrl_v1_3.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_rdcal_v1_10.vp                                                        
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_main_ctrl_v1_10.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_init_v1_0.vp                                                          
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_info_v1_0.vp                                                          
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_gatecal_v1_10.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_gate_update_ctrl_v1_3.vp                                              
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_eyecal_v1_5.vp                                                        
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_drift_ctrl_v1_0.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_dqsi_rdel_cal_v1_3.vp                                                 
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_dqs_rddata_align_v1_10.vp                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_dqs_gate_coarse_cal_v1_0.vp                                           
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_dll_update_ctrl_v1_3.vp                                               
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_dfi_v1_3.vp                                                           
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_gpll_phase_v1_0.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_data_slice_wrlvl_v1_10.vp                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_data_slice_wrcal_v1_10.vp                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_data_slice_v1_10.vp                                                   
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_data_slice_dqs_gate_cal_v1_10.vp                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_cpd_ctrl_v1_3.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_cpd_lock_v1_0.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_control_path_adj_v1_10.vp                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_calib_top_v1_10.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_calib_mux_v1_0.vp                                                     
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_rst_debounce_v1_0.vp                                                  
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ips2l_ddrphy_rst_clk_phase_adj_v1_0.vp                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/pll/ips2l_ddrphy_gpll_v1_3.vp                                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/pll/ips2l_ddrphy_ppll_v1_0.vp                                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_apb_cross_v1_2.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_calib_delay_v1_2.vp                                                  
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_cfg_apb_v1_2.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_dcd_bm_v1_2.vp                                                       
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_dcd_rowaddr_v1_2.vp                                                  
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_dcd_sm_v1_2.vp                                                       
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_dcd_top_v1_2.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_dcp_back_ctrl_v1_2.vp                                                
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_dcp_buf_v1_2.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_dcp_out_v1_2.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_dcp_top_v1_2.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_dfi_v1_2.vp                                                          
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_lp_v1_2.vp                                                           
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_mrs_v1_2.vp                                                          
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_prefetch_fifo_v1_2.vp                                                
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_rdatapath_v1_2.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_reg_fifo2_v1_2.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_ui_axi_v1_2a.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_wdatapath_v1_2.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_wdp_align_v1_2.vp                                                    
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_wdp_dcp_v1_2.vp                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/ips2l_mcdq_wrapper_v1_2b.vp                                                     
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_com_timing_v1_2.vp                                           
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_tfaw_timing_v1_2.vp                                          
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_tfaw_v1_2.vp                                                 
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_timing_act2wr_pass_v1_2.vp                                   
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_timing_act_pass_v1_2.vp                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_timing_pre_pass_v1_2.vp                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_timing_rd_pass_v1_2.vp                                       
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_timing_ref_pass_v1_2.vp                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_timing_wr_pass_v1_2.vp                                       
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/syn_mod/ips2l_mcdq_trc_timing_v1_2.vp                                           
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/distributed_fifo/ips2l_distributed_fifo_v1_0.vp                                 
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/distributed_fifo/rtl/ips2l_distributed_fifo_ctr_v1_0.vp                         
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/distributed_fifo/rtl/ips2l_distributed_fifo_v1_0_distributed_fifo_v1_0.vp       
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/mcdq_ctrl/distributed_fifo/rtl/ips2l_distributed_sdpram_v1_0_distributed_fifo_v1_0.vp     
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/ddr3.v                                                                                        
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/ddr3_ddrphy_top.v                                                                             
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/rtl/ddrphy/ddr3_slice_top_v1_10.v                                                             
| Output     | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/pnr/compile/test_ddr_comp.adf                                                                 
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/pnr/compile/test_ddr.cmr                                                                      
|            | D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/pnr/compile/cmr.db                                                                            
+---------------------------------------------------------------------------------------------------------------------------------------------------------+


Flow Command: compile -include_path {D:/fpga_rk/ddr3_test/ddr3_test/ip_core/ddr3/pnr} -top_module test_ddr
Peak memory: 197 MB
Total CPU time to compile completion : 0h:0m:1s
Process Total CPU time to compile completion : 0h:0m:1s
Total real time to compile completion : 0h:0m:10s
