###==== BEGIN Clocks 
create_clock -name {pclk} [get_pins {u_ips2l_pcie_wrap.U_IPS2L_PCIE_TOP.U_IPS2L_HSSTLP_PCIE_SOFT_PHY.pclk}] -period {4.000} -waveform {0.000 2.000}
create_clock -name {pclk_div2} [get_pins {u_ips2l_pcie_wrap.U_IPS2L_PCIE_TOP.U_IPS2L_HSSTLP_PCIE_SOFT_PHY.pclk_div2}] -period {8.000} -waveform {0.000 4.000}
create_clock -name {ref_clk} [get_pins {u_ips2l_pcie_wrap.U_IPS2L_PCIE_TOP.U_IPS2L_HSSTLP_PCIE_SOFT_PHY/P_REFCK2CORE_0}] -period {10.000} -waveform {0.000 5.000}
###==== END "create_clock"
###==== BEGIN "create_generated_clock"
###==== END "create_generated_clock"
###==== BEGIN "set_clock_latency"
###==== END "set_clock_latency"
###==== BEGIN "set_clock_uncertainty"
###==== END "set_clock_uncertainty"
###==== BEGIN "set_clock_groups"
set_clock_groups -name group_1 -asynchronous -group [get_clocks {pclk}]
set_clock_groups -name group_2 -asynchronous -group [get_clocks {pclk_div2}]
set_clock_groups -name group_3 -asynchronous -group [get_clocks {ref_clk}]
###==== END "set_clock_groups"
###==== BEGIN "set_input_delay"
###==== END "set_input_delay"

###==== BEGIN "set_output_delay"
###==== END "set_output_delay"

###==== BEGIN "set_max_delay"
###==== END "set_max_delay"

###==== BEGIN "set_min_delay"
###==== END "set_min_delay"

###==== BEGIN "set_multicycle_path"
###==== END "set_multicycle_path"

###==== BEGIN "set_false_path"
###==== END "set_false_path"

###==== BEGIN Attributes - (Populated from tab in SCOPE, do not edit)
###==== END Attributes

###==== BEGIN Logical 
define_attribute {i:u_ips2l_pcie_wrap.U_IPS2L_PCIE_TOP.U_IPS2L_HSSTLP_PCIE_SOFT_PHY.x2.GTP_HSST_2LANE_TOP.U_GTP_HSSTLP_WRAPPER.PLL0_ENABLE.U_GTP_HSSTLP_PLL0} {PAP_LOC} {HSSTLP_292_612:U0_HSSTLP_PLL}
define_attribute {i:u_ips2l_pcie_wrap.U_IPS2L_PCIE_TOP.U_IPS2L_HSSTLP_PCIE_SOFT_PHY.x2.GTP_HSST_2LANE_TOP.U_GTP_HSSTLP_WRAPPER.CHANNEL0_ENABLE.U_GTP_HSSTLP_LANE0} {PAP_LOC} {HSSTLP_292_612:U0_HSSTLP_LANE}
define_attribute {i:u_ips2l_pcie_wrap.U_IPS2L_PCIE_TOP.U_IPS2L_HSSTLP_PCIE_SOFT_PHY.x2.GTP_HSST_2LANE_TOP.U_GTP_HSSTLP_WRAPPER.CHANNEL1_ENABLE.U_GTP_HSSTLP_LANE1} {PAP_LOC} {HSSTLP_292_612:U1_HSSTLP_LANE}
###==== END Logical

###==== BEGIN Io Table
define_attribute {p:button_rst_n} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:button_rst_n} {PAP_IO_LOC} {M15}
define_attribute {p:button_rst_n} {PAP_IO_VCCIO} {3.3}
define_attribute {p:button_rst_n} {PAP_IO_STANDARD} {LVCMOS15}
define_attribute {p:button_rst_n} {PAP_IO_NONE} {TRUE}

define_attribute {p:ref_led} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ref_led} {PAP_IO_LOC} {M17}
define_attribute {p:ref_led} {PAP_IO_VCCIO} {3.3}
define_attribute {p:ref_led} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:ref_led} {PAP_IO_DRIVE} {8}
define_attribute {p:ref_led} {PAP_IO_PULLUP} {TRUE}
define_attribute {p:ref_led} {PAP_IO_SLEW} {SLOW}

define_attribute {p:pclk_led} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:pclk_led} {PAP_IO_LOC} {J16}
define_attribute {p:pclk_led} {PAP_IO_VCCIO} {3.3}
define_attribute {p:pclk_led} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:pclk_led} {PAP_IO_DRIVE} {8}
define_attribute {p:pclk_led} {PAP_IO_PULLUP} {TRUE}
define_attribute {p:pclk_led} {PAP_IO_SLEW} {SLOW}

define_attribute {p:perst_n} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:perst_n} {PAP_IO_LOC} {M16}
define_attribute {p:perst_n} {PAP_IO_VCCIO} {3.3}
define_attribute {p:perst_n} {PAP_IO_STANDARD} {LVCMOS18}
define_attribute {p:perst_n} {PAP_IO_NONE} {TRUE}

define_attribute {p:ref_clk_p} {PAP_IO_LOC} {F6}
define_attribute {p:ref_clk_n} {PAP_IO_LOC} {E6}
###==== END Io Table
define_attribute {p:i2c_sda} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:i2c_sda} {PAP_IO_LOC} {R19}
define_attribute {p:i2c_sda} {PAP_IO_VCCIO} {3.3}
define_attribute {p:i2c_sda} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:i2c_sda} {PAP_IO_DRIVE} {4}
define_attribute {p:i2c_sda} {PAP_IO_PULLUP} {TRUE}
define_attribute {p:i2c_sda} {PAP_IO_SLEW} {FAST}
define_attribute {p:i2c_scl} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:i2c_scl} {PAP_IO_LOC} {P19}
define_attribute {p:i2c_scl} {PAP_IO_VCCIO} {3.3}
define_attribute {p:i2c_scl} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:i2c_scl} {PAP_IO_PULLUP} {TRUE}
define_attribute {p:sys_clk} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:sys_clk} {PAP_IO_LOC} {V4}
define_attribute {p:sys_clk} {PAP_IO_VCCIO} {1.5}
define_attribute {p:sys_clk} {PAP_IO_STANDARD} {LVCMOS15}
define_attribute {p:sys_clk} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_data[7]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_data[7]} {PAP_IO_LOC} {AB21}
define_attribute {p:cmos1_data[7]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_data[7]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_data[7]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_data[6]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_data[6]} {PAP_IO_LOC} {Y19}
define_attribute {p:cmos1_data[6]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_data[6]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_data[6]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_data[5]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_data[5]} {PAP_IO_LOC} {AB22}
define_attribute {p:cmos1_data[5]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_data[5]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_data[5]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_data[4]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_data[4]} {PAP_IO_LOC} {L13}
define_attribute {p:cmos1_data[4]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_data[4]} {PAP_IO_STANDARD} {LVCMOS15}
define_attribute {p:cmos1_data[4]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_data[3]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_data[3]} {PAP_IO_LOC} {V19}
define_attribute {p:cmos1_data[3]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_data[3]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_data[3]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_data[2]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_data[2]} {PAP_IO_LOC} {AB20}
define_attribute {p:cmos1_data[2]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_data[2]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_data[2]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_data[1]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_data[1]} {PAP_IO_LOC} {AA19}
define_attribute {p:cmos1_data[1]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_data[1]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_data[1]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_data[0]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_data[0]} {PAP_IO_LOC} {Y18}
define_attribute {p:cmos1_data[0]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_data[0]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_data[0]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_data[7]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_data[7]} {PAP_IO_LOC} {AB18}
define_attribute {p:cmos2_data[7]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_data[7]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_data[7]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_data[6]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_data[6]} {PAP_IO_LOC} {P17}
define_attribute {p:cmos2_data[6]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_data[6]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_data[6]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_data[5]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_data[5]} {PAP_IO_LOC} {W20}
define_attribute {p:cmos2_data[5]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_data[5]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_data[5]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_data[4]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_data[4]} {PAP_IO_LOC} {W19}
define_attribute {p:cmos2_data[4]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_data[4]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_data[4]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_data[3]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_data[3]} {PAP_IO_LOC} {P15}
define_attribute {p:cmos2_data[3]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_data[3]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_data[3]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_data[2]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_data[2]} {PAP_IO_LOC} {R16}
define_attribute {p:cmos2_data[2]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_data[2]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_data[2]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_data[1]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_data[1]} {PAP_IO_LOC} {V20}
define_attribute {p:cmos2_data[1]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_data[1]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_data[1]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_data[0]} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_data[0]} {PAP_IO_LOC} {U17}
define_attribute {p:cmos2_data[0]} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_data[0]} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_data[0]} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_scl} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:cmos1_scl} {PAP_IO_LOC} {R14}
define_attribute {p:cmos1_scl} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_scl} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_scl} {PAP_IO_DRIVE} {8}
define_attribute {p:cmos1_scl} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_scl} {PAP_IO_SLEW} {SLOW}
define_attribute {p:cmos1_sda} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:cmos1_sda} {PAP_IO_LOC} {P14}
define_attribute {p:cmos1_sda} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_sda} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_sda} {PAP_IO_DRIVE} {8}
define_attribute {p:cmos1_sda} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_sda} {PAP_IO_SLEW} {SLOW}
define_attribute {p:cmos2_scl} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:cmos2_scl} {PAP_IO_LOC} {U20}
define_attribute {p:cmos2_scl} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_scl} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_scl} {PAP_IO_DRIVE} {8}
define_attribute {p:cmos2_scl} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_scl} {PAP_IO_SLEW} {SLOW}
define_attribute {p:cmos2_sda} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:cmos2_sda} {PAP_IO_LOC} {N17}
define_attribute {p:cmos2_sda} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_sda} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_sda} {PAP_IO_DRIVE} {8}
define_attribute {p:cmos2_sda} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_sda} {PAP_IO_SLEW} {SLOW}
define_attribute {p:cmos1_reset} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:cmos1_reset} {PAP_IO_LOC} {V18}
define_attribute {p:cmos1_reset} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_reset} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_reset} {PAP_IO_DRIVE} {8}
define_attribute {p:cmos1_reset} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_reset} {PAP_IO_SLEW} {SLOW}
define_attribute {p:cmos2_reset} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:cmos2_reset} {PAP_IO_LOC} {AA21}
define_attribute {p:cmos2_reset} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_reset} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_reset} {PAP_IO_DRIVE} {8}
define_attribute {p:cmos2_reset} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_reset} {PAP_IO_SLEW} {SLOW}
define_attribute {p:cmos1_href} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_href} {PAP_IO_LOC} {N15}
define_attribute {p:cmos1_href} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_href} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_href} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_pclk} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_pclk} {PAP_IO_LOC} {T18}
define_attribute {p:cmos1_pclk} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_pclk} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_pclk} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos1_vsync} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos1_vsync} {PAP_IO_LOC} {W17}
define_attribute {p:cmos1_vsync} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos1_vsync} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos1_vsync} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_href} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_href} {PAP_IO_LOC} {U18}
define_attribute {p:cmos2_href} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_href} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_href} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_pclk} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_pclk} {PAP_IO_LOC} {P16}
define_attribute {p:cmos2_pclk} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_pclk} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_pclk} {PAP_IO_NONE} {TRUE}
define_attribute {p:cmos2_vsync} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:cmos2_vsync} {PAP_IO_LOC} {R17}
define_attribute {p:cmos2_vsync} {PAP_IO_VCCIO} {3.3}
define_attribute {p:cmos2_vsync} {PAP_IO_STANDARD} {LVCMOS33}
define_attribute {p:cmos2_vsync} {PAP_IO_NONE} {TRUE}
create_clock -name {cmos1_pclk} [get_ports {cmos1_pclk}] -period {11.900} -waveform {0.000 5.950}
create_clock -name {cmos2_pclk} [get_ports {cmos2_pclk}] -period {11.900} -waveform {0.000 5.950}
#create_clock -name {sys_clk} [get_ports {sys_clk}] -period {40.000} -waveform {0.000 20.000}
create_clock -name {sys_clk} [get_ports {sys_clk}] -period {40.000} -waveform {0.000 20.000}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_LOC} {K4}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[15]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_LOC} {J4}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[14]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_LOC} {L3}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[13]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_LOC} {K3}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[12]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_LOC} {M3}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_NONE} {TRUE}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[11]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_LOC} {M2}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[10]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_LOC} {K6}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[9]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_LOC} {J6}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[8]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_LOC} {N4}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[7]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_LOC} {R1}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[6]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_LOC} {P1}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[5]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_LOC} {P2}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[4]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_LOC} {N2}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[3]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_LOC} {M6}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[2]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_LOC} {M5}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[1]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_LOC} {P6}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dq[0]} {PAP_IO_DDR_TERM_MODE} {ON}
#define_attribute {p:cmos1_data[4]} {PAP_IO_VREF_MODE} {INT}
#define_attribute {p:cmos1_data[4]} {PAP_IO_VREF_MODE_VALUE} {0.5}
#define_attribute {p:button_rst_n} {PAP_IO_VREF_MODE} {INT}
#define_attribute {p:button_rst_n} {PAP_IO_VREF_MODE_VALUE} {0.5}
#define_attribute {p:perst_n} {PAP_IO_VREF_MODE} {INT}
#define_attribute {p:perst_n} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_LOC} {M1}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_STANDARD} {SSTL15D_I}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_LOC} {P5}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_STANDARD} {SSTL15D_I}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_LOC} {L1}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_STANDARD} {SSTL15D_I}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_DIRECTION} {INOUT}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_LOC} {P4}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_STANDARD} {SSTL15D_I}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_DDR_RES} {60}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_CP_HYS} {ON}
define_attribute {p:ddr_mem_dqs[1]} {PAP_IO_CP_DYN_TERM} {ON}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_DDR_RES} {60}
define_attribute {p:ddr_mem_dqs[0]} {PAP_IO_CP_DYN_TERM} {ON}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_DDR_RES} {60}
define_attribute {p:ddr_mem_dqs_n[1]} {PAP_IO_CP_DYN_TERM} {ON}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_VREF_MODE} {INT}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_VREF_MODE_VALUE} {0.5}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_DDR_TERM_MODE} {ON}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_DDR_RES} {60}
define_attribute {p:ddr_mem_dqs_n[0]} {PAP_IO_CP_DYN_TERM} {ON}
define_attribute {p:ddr_mem_a[14]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[14]} {PAP_IO_LOC} {AB2}
define_attribute {p:ddr_mem_a[14]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[14]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[14]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[14]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[14]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[13]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[13]} {PAP_IO_LOC} {AB3}
define_attribute {p:ddr_mem_a[13]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[13]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[13]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[13]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[13]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[12]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[12]} {PAP_IO_LOC} {AB1}
define_attribute {p:ddr_mem_a[12]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[12]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[12]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[12]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[12]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[11]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[11]} {PAP_IO_LOC} {AA1}
define_attribute {p:ddr_mem_a[11]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[11]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[11]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[11]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[11]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[10]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[10]} {PAP_IO_LOC} {U3}
define_attribute {p:ddr_mem_a[10]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[10]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[10]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[10]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[10]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[9]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[9]} {PAP_IO_LOC} {Y1}
define_attribute {p:ddr_mem_a[9]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[9]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[9]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[9]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[9]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[8]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[8]} {PAP_IO_LOC} {W1}
define_attribute {p:ddr_mem_a[8]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[8]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[8]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[8]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[8]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[7]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[7]} {PAP_IO_LOC} {Y2}
define_attribute {p:ddr_mem_a[7]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[7]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[7]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[7]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[7]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[6]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[6]} {PAP_IO_LOC} {W2}
define_attribute {p:ddr_mem_a[6]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[6]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[6]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[6]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[6]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[5]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[5]} {PAP_IO_LOC} {R2}
define_attribute {p:ddr_mem_a[5]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[5]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[5]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[5]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[5]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[4]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[4]} {PAP_IO_LOC} {R3}
define_attribute {p:ddr_mem_a[4]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[4]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[4]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[4]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[4]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[3]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[3]} {PAP_IO_LOC} {V2}
define_attribute {p:ddr_mem_a[3]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[3]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[3]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[3]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[3]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[2]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[2]} {PAP_IO_LOC} {U2}
define_attribute {p:ddr_mem_a[2]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[2]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[2]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[2]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[2]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[1]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[1]} {PAP_IO_LOC} {U1}
define_attribute {p:ddr_mem_a[1]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[1]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[1]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[1]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[1]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_a[0]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_a[0]} {PAP_IO_LOC} {T1}
define_attribute {p:ddr_mem_a[0]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_a[0]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_a[0]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_a[0]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_a[0]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_ba[2]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_ba[2]} {PAP_IO_LOC} {AB5}
define_attribute {p:ddr_mem_ba[2]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_ba[2]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_ba[2]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_ba[2]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_ba[2]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_ba[1]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_ba[1]} {PAP_IO_LOC} {AA5}
define_attribute {p:ddr_mem_ba[1]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_ba[1]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_ba[1]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_ba[1]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_ba[1]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_ba[0]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_ba[0]} {PAP_IO_LOC} {AA3}
define_attribute {p:ddr_mem_ba[0]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_ba[0]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_ba[0]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_ba[0]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_ba[0]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dm[1]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_dm[1]} {PAP_IO_LOC} {L5}
define_attribute {p:ddr_mem_dm[1]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dm[1]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dm[1]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dm[1]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dm[1]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_dm[0]} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_dm[0]} {PAP_IO_LOC} {N5}
define_attribute {p:ddr_mem_dm[0]} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_dm[0]} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_dm[0]} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_dm[0]} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_dm[0]} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_cas_n} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_cas_n} {PAP_IO_LOC} {U6}
define_attribute {p:ddr_mem_cas_n} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_cas_n} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_cas_n} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_cas_n} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_cas_n} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_ck} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_ck} {PAP_IO_LOC} {Y4}
define_attribute {p:ddr_mem_ck} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_ck} {PAP_IO_STANDARD} {SSTL15D_I}
define_attribute {p:ddr_mem_ck} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_ck} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_ck} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_ck_n} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_ck_n} {PAP_IO_LOC} {AA4}
define_attribute {p:ddr_mem_ck_n} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_ck_n} {PAP_IO_STANDARD} {SSTL15D_I}
define_attribute {p:ddr_mem_ck_n} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_ck_n} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_ck_n} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_cke} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_cke} {PAP_IO_LOC} {W4}
define_attribute {p:ddr_mem_cke} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_cke} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_cke} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_cke} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_cke} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_cs_n} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_cs_n} {PAP_IO_LOC} {V5}
define_attribute {p:ddr_mem_cs_n} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_cs_n} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_cs_n} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_cs_n} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_cs_n} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_odt} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_odt} {PAP_IO_LOC} {R6}
define_attribute {p:ddr_mem_odt} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_odt} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_odt} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_odt} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_odt} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_ras_n} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_ras_n} {PAP_IO_LOC} {W5}
define_attribute {p:ddr_mem_ras_n} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_ras_n} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_ras_n} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_ras_n} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_ras_n} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_rst_n} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_rst_n} {PAP_IO_LOC} {T3}
define_attribute {p:ddr_mem_rst_n} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_rst_n} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_rst_n} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_rst_n} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_rst_n} {PAP_IO_SLEW} {FAST}
define_attribute {p:ddr_mem_we_n} {PAP_IO_DIRECTION} {OUTPUT}
define_attribute {p:ddr_mem_we_n} {PAP_IO_LOC} {W6}
define_attribute {p:ddr_mem_we_n} {PAP_IO_VCCIO} {1.5}
define_attribute {p:ddr_mem_we_n} {PAP_IO_STANDARD} {SSTL15_I}
define_attribute {p:ddr_mem_we_n} {PAP_IO_DRIVE} {8.9}
define_attribute {p:ddr_mem_we_n} {PAP_IO_UNUSED} {TRUE}
define_attribute {p:ddr_mem_we_n} {PAP_IO_SLEW} {FAST}
